Computer Computer Hardware User's Manual

3-9
BIOS Setup
Advanced Chipset Features
DRAM Clock By
Selects whether DRAM clock is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to [By SPD] enables the following fields auto-
matically to be determined by BIOS based on the configurations on the SPD. User can
specifiy the desired DRAM clock among the setting options: [By SPD], [1:1], [DDR-
200], [DDR-266], [DDR-333], [DDR-400].
Current CAS Latency / Current TRCD / Current TRP / Current TRAS
These items show the current CAS latency TRCD, TRP & TRAS. Read only.
DRAM Timing
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to [By SPD] enables the following fields auto-
matically to be determined by BIOS based on the configurations on the SPD. Selecting
[Manual] allows users to configure these fields manually.
CAS Latency
This field controls the CAS latency, which determines the timing delay before RAM
starts a read command after receiving it. Setting options are: [1], [1.5], [2], [2.5], [3],
[3.5], [4]. Setting to [1] increases system performance while [4] provides more stable
system performance.
MSI Reminds You...
Change these settings only if you are familiar with the chipset.