Data Sheet

MCP23008/MCP23S08
DS21919E-page 14 © 2007 Microchip Technology Inc.
1.6.5 INTERRUPT CONTROL (INTCON)
REGISTER
The INTCON register controls how the associated pin
value is compared for the interrupt-on-change feature.
If a bit is set, the corresponding I/O pin is compared
against the associated bit in the DEFVAL register. If a
bit value is clear, the corresponding I/O pin is compared
against the previous value.
REGISTER 1-5: INTCON – INTERRUPT-ON-CHANGE CONTROL REGISTER (ADDR 0x04)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IOC7 IOC6 IOC5 IOC4 IOC3 IOC2 IOC1 IOC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 IOC7:IOC0: These bits control how the associated pin value is compared for interrupt-on-change
<7:0>
1 = Controls how the associated pin value is compared for interrupt-on-change.
0 = Pin value is compared against the previous pin value.
Refer to INTCON and GPINTEN.