GPIB-COM User Manual June 1990 Edition Part Number 320197-01 © Copyright 1989, 1991 National Instruments Corporation. All Rights Reserved.
National Instruments Corporation 6504 Bridge Point Parkway Austin, TX 78730-5039 (512) 794-0100 (800) IEEE-488 (toll-free U.S.
Limited Warranty The GPIB-COM is warranted against defects in materials and workmanship for a period of two years from date of shipment. National Instruments will repair or replace equipment which proves to be defective during the warranty period. This warranty includes parts and labor. A Return Material Authorization (RMA) number must be obtained from National Instruments before any equipment is returned for repair. Faults caused by misuse are not covered under the warranty.
FCC/DOC Radio Frequency Interference Compliance This equipment generates and uses radio frequency energy and, if not installed and used in strict accordance with the instructions in this manual, may cause interference to radio and television reception. This equipment has been tested and found to comply with (1) the limits for a Class B computing device, in accordance with the specifications in Part 15 of U.S.
Preface Introduction to the GPIB-COM The GPIB-COM is a high-performance talk/listen interface board that makes communication possible between IEEE-488 devices and IBM personal computers and compatibles (hereafter referred to as PCs) equipped with software that uses the serial ports. Organization of This Manual This manual is divided into the following sections: Section One, Introduction, contains a brief description of the GPIB-COM including a listing of its features, accessories, and components.
Preface Abbreviations Used in This Manual The following abbreviations are used in the text of this manual. ≤ ≥ ± A C hex in.
Contents Section One Introduction ..........................................................................................................................1-1 GPIB-COM Characteristics............................................................................................ 1-1 What Your Kit Should Contain ...................................................................................... 1-2 Optional Equipment.............................................................................................
Contents Line Control Register..........................................................................................5-8 Modem Control Register .................................................................................... 5-10 Line Status Register ............................................................................................ 5-12 Modem Status Register.......................................................................................5-14 Programming the Serial Adapter ...........
Contents Figures Figure 1-1. GPIB-COM Board ................................................................................................1-2 Figure 2-1. Figure 2-2. Figure 2-3. Figure 2-4. Figure 2-5. Figure 2-6. GPIB-COM Parts Locator Diagram......................................................................2-1 Possible Settings for GPIB-COM Jumpers...........................................................2-4 Jumper W1 Settings ......................................................................
Section One Introduction This section contains a brief description of the GPIB-COM interface and a list of its characteristics and components. GPIB-COM Characteristics The National Instruments GPIB-COM is a high-performance talk/listen interface that converts data between a standard serial port format and IEEE-488 General Purpose Interface Bus (GPIB) format for use with IEEE-488 printers and plotters. It can be used with any serial port software on the PC.
Introduction Section One Figure 1-1 shows the GPIB-COM interface board. Figure 1-1. GPIB-COM Board What Your Kit Should Contain Your kit should contain the following components: Item Part Number GPIB-COM interface board 180750-01 GPIB-COM User Manual 320197-01 GPIB-COM Diagnostic Test Diskette 420212-45 Note: The GPIB-COM Diagnostic Test Diskette contains the com.exe diagnostic test that is described in Section Four, Running Diagnostic Tests. Make sure each of these items is in your kit.
Section One Introduction Optional Equipment Item Part Number Double-Shielded Cables: GPIB Type X2 Cable - 1 m 763061-01 GPIB Type X2 Cable - 2 m 763061-02 GPIB Type X2 Cable - 4 m 763061-03 * In order to meet FCC emission limits for a Class B device, you must use a shielded GPIB cable. Operating this equipment with a non-shielded cable may cause interference to radio and television reception in residential areas.
Section Two Configuration and Installation This section contains information on how to configure and install the GPIB-COM into your system. Configuration Figure 2-1 shows the locations of the GPIB-COM configuration jumpers and switches. Figure 2-1.
Configuration and Installation Section Two When installing the GPIB-COM you must determine which serial port the GPIB-COM board will respond to and select the appropriate base address and interrupt level. The GPIB-COM can be configured to one of four base addresses: • 3F8 for Serial Port 1 • 2F8 for Serial Port 2 • 3E8 for Serial Port 3 • 2E8 for Serial Port 4 Note: DOS and BIOS only recognize base addresses 3F8 and 2F8. The GPIB-COM is shipped from the factory set to 3F8.
Section Two Configuration and Installation Table 2-1 shows the standard base I/O address and interrupt level for each serial port. Table 2-1. IBM PC Serial Port Adapters Name of Port Base I/O Address (hex) Interrupt Level Serial Port 1 3F8 4 Serial Port 2 2F8 3 Serial Port 3 3E8 Not Used Serial Port 4 2E8 Not Used Switch and Jumper Settings Table 2-2 shows the factory settings and optional configurations for the switches and jumpers on the GPIB-COM. Table 2-2.
Configuration and Installation Section Two Figure 2-2 shows the four possible combinations of jumper settings. W5 W5 • XE8 XF8 • XE8 XF8 3X8 • 2X8 3X8 • 2X8 IRQ4 • IRQ3 • IRQ3 IRQ4 W2 W2 a. COM1: Jumpers Set to Base I/O Address 3F8 hex and Interrupt Level 4 (Default) b. COM2: Jumpers Set to Base I/O Address 2F8 hex and Interrupt Level 3 W5 XF8 • 3X8 IRQ4 W5 XE8 XF8 • XE8 • 2X8 3X8 • 2X8 • IRQ3 • • IRQ4 • IRQ3 W2 W2 c.
Section Two Configuration and Installation Talk/Listen Address and Special Function Selection The GPIB-COM interface board has eight onboard DIP switches you can use to configure the GPIB controller responsibilities. In the talk/listen mode, the first five switches set the talk or listen address of the external device(s) that will be attached to the GPIB-COM. In the talk-only mode, the GPIB-COM does not send a talk or listen address.
Configuration and Installation Section Two Figure 2-5 shows the switch configuration needed when using a device with listen address 10 hex. The listen address varies with each device so check the listen address of your device and set these five bits accordingly. Key = side you must press down for Listen Address 10; Off = 1; On = 0 = used for setting REN* ON, IFC* ON, and SRQ* ON This side down for logic 1 This side down for logic 0 U13 1 2 3 2 4 4 5 8 16 6 7 REN IFC 8 OFF 1 SRQ Figure 2-5.
Section Two Configuration and Installation Figure 2-6 shows the switch configuration for REN* asserted, IFC* disabled, and SRQ* disabled. Key = side you must press down for REN* ON, IFC* OFF, and SRQ* OFF; Off = 1; On = 0. = used for setting Listen Address This side down for logic 1 This side down for logic 0 U13 1 2 3 4 4 8 5 16 6 7 8 OFF 1 REN IFC 2 SRQ Figure 2-6.
Configuration and Installation Section Two 7. Check the installation. 8. Replace the expansion slot cover of your computer. 9. Connect the GPIB cable to the GPIB-COM. Special Considerations When Using the GPIB-COM The GPIB-COM does not support XON/XOFF protocols. If your application software uses XON/XOFF protocols, send your printer and plotter output to a file on disk.
Section Three Function Description This section contains a block diagram of the GPIB-COM, followed by a description of each of its functional components. The GPIB-COM Interface The GPIB-COM is a completely transparent interface between GPIB devices and any IBM PC software that uses serial ports. A set of I/O registers identical to those on the standard IBM serial adapter is used.
Function Description Section Three Figure 3-1 shows a block diagram of the GPIB-COM. IRQ3 PC I/O Channel IRQ4 Address Bus Config. Jumpers Interrupt Control Config. Jumpers AEN INS8250A Compatible Registers Address Decoding IOW* IOR* Data Bus Direction Buffer Mode Control Logic Acceptor Handshake Direction Buffer Source Handshake GPIB Transceivers GPIB Figure 3-1.
Section Three Function Description GPIB-COM Components The interface consists of the following functional components: • Address Decoding • Configuration Jumpers • INS8250A Compatible Registers • GPIB Acceptor and Source Handshaking • Mode Control Logic • Interrupt Control Logic • Direction Buffers • GPIB Transceivers Address Decoding Address decoding monitors the PC address bus to recognize when a GPIB-COM address is present and enables a read and/or write to its registers.
Function Description Section Three Direction Buffers These buffers control the direction in which data information travels. GPIB Transceivers The GPIB-COM is interfaced to the IEEE-488 bus by National Semiconductor 75160A and 75162A transceivers. These integrated circuits are specifically designed to provide powerup/power-down bus protection (glitch-free).
Section Four Running Diagnostic Tests The GPIB-COM Test Commands The GPIB-COM Diagnostic Tests can be used to verify the configuration of the GPIB-COM and its connection to a GPIB printer or plotter. To run a GPIB-COM diagnostic test, connect a printer or plotter to the GPIB and run the program com.exe from the GPIB-COM diagnostic test diskette.
Running Diagnostic Tests Section Four The printer should begin printing a string of characters. To stop the test, press any key. The following message then appears: Printer test finished. Please check output to printer with user manual instructions. The output on the printer should read: NATIONAL INSTRUMENTS GPIB-COM DIAGNOSTIC TEST!"#$%&'()*+,-. /0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]_'abcdefghijkl mnopqrstuvwxyz{|}~ !"#$%&'()*+,.
Section Four Running Diagnostic Tests When it is finished, the following message appears on the screen: Plotter test finished. Please check output to plotter with user manual instructions. If the plotter does not respond or the output on the plotter does not match Figure 4-1, check again to be sure that all of the connections are tight and the jumpers are all set correctly. Try the test again. If it still does not work, write down any error messages that appear and call National Instruments.
Section Five Programming the GPIB-COM This section presents a description of the GPIB-COM Serial Port Emulator registers and information on programming the GPIB-COM. You need to use this section only if you are writing your own serial port device driver. The GPIB-COM Registers IBM's serial adapter is a plug-in card for the PC that handles RS-232 communication.
Programming the GPIB-COM Section Five Transmitter Holding Register Offset from Base I/O Address = 0 Register Address = XF8 DLAB bit in Line Control Register = 0 7 6 5 4 3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0 W The Transmitter Holding Register contains the character to be sent to the serial output, with bit 0 being the least significant and bit 7 the most significant. It functions identically on the GPIB-COM and the INS8250.
Section Five Programming the GPIB-COM Receive Buffer Register Offset from Base I/O Address = 0 Register Address = XF8 DLAB bit in Line Control Register = 0 7 6 5 4 3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0 R The Receive Buffer Register contains the character received from the serial input, with bit 0 being the least significant and bit 7 the most significant. It functions identically on the GPIB-COM and the INS8250.
Programming the GPIB-COM Section Five Divisor Latch Least Significant Byte (LSB) Register Offset from Base I/O Address = 0 Register Address = XF8 DLAB bit in Line Control Register = 1 7 6 5 4 3 2 1 0 DL7 DL6 DL5 DL4 DL3 DL2 DL1 DL0 Bit Mnemonic Description 7-0r/w DL[7-0] Data Bits 7 through 0 R/W Divisor Latch Most Significant Byte (MSB) Register Offset from Base I/O Address = 1 Register Address = XF9 DLAB bit in Line Control Register = 1 7 6 5 4 3 2 1 0 DL15 DL14 DL13
Section Five Programming the GPIB-COM Interrupt Enable Register Offset from Base I/O Address = 1 Register Address = XF9 DLAB bit in Line Control Register = 0 7 6 5 4 3 2 1 0 0 0 0 0 MS RLS THR RDA R/W The Interrupt Enable Register is a read/write register that allows the programmer to selectively enable or disable each of the four possible types of interrupts generated by the INS8250. The high four bits are not used and are permanently cleared.
Programming the GPIB-COM Section Five Bit Mnemonic Description 1r/w THR Transmitter Holding Register Interrupt Enable Bit This bit enables a transmitter holding register empty interrupt when set. The transmitter holding register empty interrupt occurs when the INS8250 becomes ready to send another character. This bit functions identically on the GPIB-COM and the INS8250. 0r/w RDA Received Data Available Interrupt Enable Bit This bit enables a received data available interrupt when set.
Section Five Programming the GPIB-COM Interrupt Identification Register Offset from Base I/O Address = 2 Register Address = XFA 7 6 5 4 3 2 1 0 0 0 0 0 0 ID1 ID0 INT R The Interrupt Identification Register is a read-only register which tells you when an interrupt is pending and if so, what kind of interrupt it is. This register functions identically on the GPIBCOM and the INS8250. Bit Mnemonic Description 7-3r 0 Reserved Bits 7 through 3 These bits always read as 0.
Programming the GPIB-COM Section Five Line Control Register Offset from Base I/O Address = 3 Register Address = XFB 7 6 5 4 3 2 1 0 DLAB SBRK STP EVEN PEN STB WL1 WL0 R/W The Line Control Register is a read/write register that allows the programmer to set the RS-232 parameters for the INS8250. The function of each bit in this register is explained below.
Section Five Programming the GPIB-COM Bit Mnemonic Description 3r/w PEN Parity Enable Bit If this bit is set, the INS8250 will generate and check parity according to the values of the STP and EVEN bits (bits 4 and 5). If this bit is clear, the INS8250 will not generate or check parity bits. This bit is ignored by the GPIB-COM. 2r/w STB Stop Bit Control Bit This bit controls the number of stop bits sent and verified by the INS8250. If this bit is set, two stop bits will be used.
Programming the GPIB-COM Section Five Modem Control Register Offset from Base I/O Address = 4 Register Address = XFC 7 6 5 4 3 2 1 0 0 0 0 LOOP OUT2 OUT1 RTS DTR R/W The Modem Control Register is a read/write register that controls RS-232 output lines for communication with a modem or modem emulator. The function of each bit in this register is explained below. Bit Mnemonic Description 7-5r/w 0 Reserved Bits 7 through 5 These bits always read as 0.
Section Five Programming the GPIB-COM Bit Mnemonic Description 0r/w DTR Data Terminal Ready Bit The DTR serial port output is the inverse of this bit. This bit is set when the Controller is ready to communicate. On the GPIB-COM, this bit is used along with the RTS bit to control the CTS bit of the Modem Status Register.
Programming the GPIB-COM Section Five Line Status Register Offset from Base I/O Address = 5 Register Address = XFD 7 6 5 4 3 2 1 0 0 TEMT THRE BI FE PE OE DR R The Line Status Register provides information about the status of the data transfer. On the GPIBCOM this register is implemented as a read-only register. Writing to the line status register will not change its contents. The function of each bit in this register is explained below.
Section Five Programming the GPIB-COM Bit Mnemonic Description 3r FE Framing Error Bit This bit is set when the received character does not have a valid stop bit. On the GPIB-COM, this bit is always clear. 2r PE Parity Error Bit This bit is set when the received character does not have the correct parity. It is cleared when the processor reads the Line Status Register. On the GPIB-COM, this bit is set when the SRQ* line of the GPIB is asserted.
Programming the GPIB-COM Section Five Modem Status Register Offset from Base I/O Address = 6 Register Address = XFE 7 6 5 4 3 2 1 0 DCD RI DSR CTS DDCD TERI DDSR DCTS R The Modem Status Register gives the state of the modem control lines and tells whether any of these lines have changed state since the register was last read. This register is read only on the GPIB-COM. Writing to this register will not change its contents. The function of each bit in this register is explained below.
Section Five Programming the GPIB-COM Bit Mnemonic Description 2r TERI Trailing Edge Ring Indicator Bit This bit is set when the serial port RI input signal changes from a logical 1 to a logical 0 and cleared when the processor reads the Modem Status Register. On the GPIB-COM, this bit is always clear. 1r DDSR Delta Set Ready Bit This bit is set when the serial port DSR input signal changes state and cleared when the processor reads the Modem Status Register.
Programming the GPIB-COM Section Five Programming the Serial Adapter The operation of the serial adapter is controlled by software, either IBM BIOS or an application. To transfer data to and from the serial port, the communications parameters must first be set up in the following manner: 1. Load the baud rate divisor into the divisor latch. 2. Store the RS-232 parameters in the Line Control Register. 3. Send the modem control signals by writing to the Modem Control Register. 4.
Section Five Programming the GPIB-COM The GPIB-COM Controller Function Because most serial port applications involve communication with only one serial line, the GPIBCOM imposes some restrictions on the GPIB in order to be compatible with existing serial port software. The GPIB-COM must be System Controller of the GPIB and will not work with other Controllers. The behavior of the GPIB-COM depends on the setting of the talk-only jumper.
Appendix A Specifications This appendix lists the specifications of the GPIB-COM board. Power Requirement +5 VDC (± 5%) 0.75 A typical Physical Dimensions 4.2 in. by 8.75 in.
Appendix B Multiline Interface Command Messages The following tables are multiline interface messages (sent and received with ATN TRUE).
Multiline Interface Command Messages Appendix B Multiline Interface Messages Hex Oct Dec ASCII Msg 00 01 02 03 04 05 06 07 000 001 002 003 004 005 006 007 0 1 2 3 4 5 6 7 08 09 0A 0B 0C 0D 0E 0F 010 011 012 013 014 015 016 017 8 9 10 11 12 13 14 15 BS HT LF VT FF CR SO SI 10 11 12 13 14 15 16 17 020 021 022 023 024 025 026 027 16 17 18 19 20 21 22 23 DLE DC1 DC2 DC3 DC4 NAK SYN ETB 18 19 1A 1B 1C 1D 1E 1F 030 031 032 033 034 035 036 037 24 25 26 27 28 29 30 31 CAN EM SUB ESC FS GS RS US
Appendix B Multiline Interface Command Messages Multiline Interface Messages Hex Oct 40 41 42 43 44 45 46 47 100 101 102 103 104 105 106 107 64 65 66 67 68 69 70 71 48 49 4A 4B 4C 4D 4E 4F 110 111 112 113 114 115 116 117 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F PPE PPU SDC SPD Dec ASCII Msg Hex Oct @ A B C D E F G MTA0 MTA1 MTA2 MTA3 MTA4 MTA5 MTA6 MTA7 60 61 62 63 64 65 66 67 140 141 142 143 144 145 146 147 96 97 98 99 100 101 102 103 ` a b c d e f g MSA0,PPE MSA1,PPE MSA2,PPE M
Appendix C Operation of the GPIB History of the GPIB The GPIB is a link, bus, or interface system through which interconnected electronic devices communicate. Hewlett-Packard invented the GPIB, which they call the HP-IB, to connect and control programmable instruments manufactured by them. Because of its high system data rate ceilings of from 250 kbytes/sec to 1 Mbyte/sec, the GPIB quickly became popular in other applications such as intercomputer communication and peripheral control.
Operation of the GPIB Appendix C The Controller usually addresses a Talker and a Listener before the Talker can send its message to the Listener. After the message is transmitted, the Controller usually unaddresses both devices. Some bus configurations do not require a Controller. For example, one device may only be a Talker (called a talk-only device) and there may be one or more listen-only devices. A Controller is necessary when the active or addressed Talker or Listener must be changed.
Appendix C Operation of the GPIB Figure C-1 shows the arrangement of these signals on the GPIB cable connector. DIO1* DIO2* DIO3* DIO4* EOI* DAV* NRFD* NDAC* IFC* SRQ* ATN* SHIELD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DIO5* DIO6* DIO7* DIO8* REN* GND (TW PAIR W/DAV*) GND (TW PAIR W/NRFD*) GND (TW PAIR W/NDAC*) GND (TW PAIR W/IFC*) GND (TW PAIR W/SRQ*) GND (TW PAIR W/ATN*) SIGNAL GROUND Figure C-1.
Operation of the GPIB Appendix C DAV (data valid) DAV tells when the signals on the data lines are stable (valid) and can be accepted safely by devices. The Controller drives DAV when sending commands, and the Talker drives it when sending data messages. The way in which NRFD and NDAC are used by the receiving device is called the Acceptor Handshake. Likewise, the sending device uses DAV in the Source Handshake.
Appendix C Operation of the GPIB Physical and Electrical Characteristics Devices are usually connected with a cable assembly consisting of a shielded 24-conductor cable with both a plug and receptacle at each end. This design enables devices to be connected in either a linear or a star configuration, or a combination of the two. See Figures C-2 and C-3. Figure C-2.
Operation of the GPIB Appendix C Figure C-3. Star Configuration of GPIB Devices The standard connector is the Amphenol or Cinch Series 57 MICRORIBBON or AMP CHAMP type. An adapter cable using non-standard cable and/or connector is used for special interconnect applications. The GPIB uses negative logic with standard TTL logic levels. When DAV is true, for example, it is a TTL low level (≤ 0.8 V), and when DAV is false, it is a TTL high level (≥ 2.0 V).
Appendix C Operation of the GPIB Configuration Restrictions To achieve the high data transfer rate that the GPIB is designed for, the physical distance between devices and the number of devices on the bus is limited. The following restrictions are typical: • A maximum separation of 4 m between any two devices and an average separation of 2 m over the entire bus. • A maximum total cable length of 20 m. • No more than 15 devices connected to each bus, with at least two-thirds powered-on.
User Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: GPIB-COM User Manual Edition Date June 1990 Part Number: 320197-01 Please comment on the completeness, clarity, and organization of the manual. If you find errors in the manual, please record the page numbers and describe the errors. Thank you for your help.
