User manual

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µPD750008 USER'S MANUAL
(c) Specific 1-bit direct addressing (@H+mem.bit)
This addressing mode enables any bit in the data memory space to be manipulated.
In this addressing mode, the high-order four bits of the data memory address in the memory bank
specified by MB = MBE·MBS are indirectly specified using the H register, and the low-order four bits
and bit address are directly specified in the operand. This addressing mode enables a wide variety
of manipulations for each bit in the entire data memory space.
Example Bit 2 at address 32H (FLAG3) is reset if both bit 3 at address 30H (FLAG1) and bit 0 at
address 31H (FLAG2) are set to 0 or 1.
FLAG1 EQU 30H.3
FLAG2 EQU 31H.0
FLAG3 EQU 32H.2
SEL MB0
MOV H,#FLAG1 SHR 6
MOV1 CY, @H+FLAG1 ; CY <– FLAG1
XOR1 CY, @H+FLAG2 ; CY <– CY FLAG2
MOV1 @H+FLAG3, CY ; FLAG3 <– CY
FLAG3
FLAG1
FLAG2