User manual
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CHAPTER 3 FEATURES OF THE ARCHITECTURE AND MEMORY MAP
3.3 MEMORY-MAPPED I/O
The µPD750008 employs memory-mapped I/O, which maps peripheral hardware such as timers and I/O
ports to addresses F80H to FFFH in data memory space as shown in Figure 3-2. This means that there is
no particular instruction to control peripheral hardware, but all peripheral hardware is controlled using memory
manipulation instructions. (Some mnemonics for hardware control are available to make programs readable.)
To manipulate peripheral hardware, the addressing modes listed in Table 3-4 can be used.
Table 3-4. Addressing Modes Applicable to Peripheral Hardware Operation
Applicable addressing mode Applicable hardware
Bit Direct addressing mode specifying mem.bit with All hardware
manipulation MBE = 0 (MBE = 1, MBS = 15) allowing bit manipulation
Direct addressing mode specifying fmem.bit regardless of IST1, IST0, MBE, RBE,
MBE and MBS setting IExxx, IRQxxx, PORTn.x
Indirect addressing mode specifying pmem.@L regardless of BSBn.x
MBE and MBS setting PORTn.x
4-bit Direct addressing mode specifying mem with All hardware allowing 4-bit
manipulation MBE = 0 or (MBE = 1, MBS = 15) manipulation
Register indirect addressing mode specifying @HL with
(MBE = 1, MBS = 15)
8-bit Direct addressing mode specifying mem (even address) with All hardware allowing 8-bit
manipulation MBE = 0 or (MBE = 1, MBS = 15) manipulation
Register indirect addressing mode specifying @HL
(with the L register containing an even number) with
MBE = 1 and MBS = 15
Figure 3-7 summarizes the I/O map of the µPD750008.
The items in the figure have the following meanings:
• Symbol : Name representing incorporated hardware, which can be coded in the operand field of an
instruction
• R/W : Indicates whether the hardware allows read/write operation.
R/W : Both read and write operations possible
R : Read only
W : Write only
• Number of manipulatable bits:
Indicates the number of bits that can be processed at a time in hardware manipulation
O : Bit manipulation is possible in units of the indicated number of bits (1, 4, or 8 bits).
Ð : Particular bits can be manipulated. For these bits, see Remarks.
– : Bit manipulation is impossible in units of the indicated number of bits (1, 4, or 8 bits).
• Bit manipulation addressing:
Bit manipulation addressing applicable in hardware bit manipulation