User manual

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CHAPTER 4 INTERNAL CPU FUNCTIONS
4.4 DATA MEMORY (RAM): 512 WORDS x 4 BITS
The data memory consists of a data area and peripheral hardware area as shown in Figure 4-7.
The data memory consists of the following memory banks with each bank made of 256 words x 4 bits.
• Memory banks 0 and 1 (data area)
• Memory bank 15 (peripheral hardware area)
4.4.1 Data Memory Configuration
(1) Data area
The data area consists of a static RAM, and is used for storing program data and as stack memory for
subroutine and interrupt execution. Battery backup enables the memory to hold data for a long time even
if the CPU is stopped in the standby mode. The data area can be manipulated with memory manipulation
instructions.
The static RAM is mapped to memory banks 0 and 1, with each made up of 256 x 4 bits. Bank 0 is used
as a data area, but can also be used as a general register area (000H to 01FH) and stack area
Note
(000H
to 1FFH).
Whole locations in memory banks 0, 1, 2, and 3 (000H to 3FFH) can be used as a stack area.
The static RAM has a configuration of four bits per address. However, the memory can be manipulated
in 8 bit units using an 8-bit memory manipulation instruction, and in bit units using a bit manipulation
instruction. Note that an even address must be specified in an 8-bit manipulation instruction.
Note Memory bank 0 or 1 can be selected as the stack area.
• General register area
The general register area can be manipulated with either general register manipulation instructions or
memory manipulation instructions. Up to eight 4-bit registers are available. Of the 8 general registers,
registers not used by the program can be used as a data area or stack area. (See Section 4.5.)
• Stack memory area
The stack memory area is set by the instruction. This area can be used as a save area for subroutine
or interrupt execution. (See Section 4.7.)
(2) Peripheral hardware area
The peripheral hardware area is mapped at addresses F80H to FFFH of memory bank 15.
Memory manipulation instructions are used to manipulate the peripheral hardware area as well as the static
RAM area. Note that, however, the number of bits to be manipulated at a time varies according to the
individual addresses. Addresses to which no peripheral hardware is assigned cannot be accessed since
such address locations contain no data memory. (See Figure 3-7.)
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