Datasheet

Intel® Xeon® Processor E5-2400 v2 Product Family 14
Datasheet Volume One
Overview
1.1.1 Processor Feature Details
• Up to 10 execution cores
• Each core supports two threads (Intel® Hyper-Threading Technology), up to 20
threads per socket
• 46-bit physical addressing and 48-bit virtual addressing
• 1 GB large page support for server applications
• A 32-KB instruction and 32-KB data first-level cache (L1) for each core
• A 256-KB shared instruction/data mid-level (L2) cache for each core
• Up to 25 MB last level cache (LLC): up to 2.5 MB per core instruction/data last level
cache (LLC), shared among all cores
• Protected Processor Inventory Number (PPIN): A solution for inventory
management available on Intel Xeon processor E5 product families for use in server
platforms.
1.1.2 Supported Technologies
• Intel® Virtualization Technology (Intel® VT)
• Intel® Virtualization Technology for Directed I/O (Intel® VT-d)
• Boxed Processor Specifications
Volume 2: Register Information
• Configuration Process and Registers
• Processor Integrated I/O (IIO) Configuration Registers
• Processor Uncore Configuration Registers
Table 1-2. Volume Structure and Scope (Sheet 2 of 2)
Figure 1-1. Processor Two-Socket Platform