Datasheet

Intel® Xeon® Processor E5-2400 v2 Product Family 149
Datasheet Volume One
Notes:
1. For specific routing guidelines, see the Platform Design Guide (PDG) for details.
2. IVT_ID_N land is connected to the Vss plane within the package substrate.
7.8.3.1 PCI Express* DC Specifications
The processor DC specifications for the PCI Express* are available in the PCI Express
Base Specification - Revision 3.0
. This document will provide only the processor
exceptions to the
PCI Express Base Specification - Revision 3.0.
7.8.3.2 DMI2/PCI Express* DC Specifications
The processor DC specifications for the DMI2/PCI Express* are available in the PCI
Express Base Specification 2.0 and 1.0. This document will provide only the processor
exceptions to the
PCI Express Base Specification 2.0 and 1.0.
7.8.3.3 Intel® QuickPath Interconnect DC Specifications
Intel QuickPath Interconnect specifications are defined at the processor lands. Please
refer to the appropriate platform design guidelines for specific implementation details.
In most cases, termination resistors are not required as these are integrated into the
processor silicon.
The processor DC specifications for the Intel® QPI interface are available in the
Intel®
QuickPath Interconnect V1.1 Base Electrical Specification and Validation Methodologies
.
This document will provide only the processor exceptions to the
Intel® QuickPath
Interconnect V1.1 Base Electrical Specification and Validation Methodologies.
7.8.3.4 Reset and Miscellaneous Signal DC Specifications
For a power-on Reset, RESET_N must stay active for at least 3.5 millisecond after V
CC
and BCLK{0/1} have reached their proper specifications. RESET_N must not be kept
asserted for more than 100 ms while PWRGOOD is asserted. RESET_N must be held
asserted for at least 3.5 millisecond before it is deasserted again. RESET_N must be
held asserted before PWRGOOD is asserted. This signal does not have on-die
termination and must be terminated on the system board.
7.8.3.5 PCI Express* AC Specifications
The processor AC specifications for the PCI Express* are available in the PCI Express
Base Specification - Revision 3.0
. This document will provide only the processor
exceptions to the
PCI Express Base Specification - Revision 3.0.
V
O_ABS_MAX
Output Absolute Max Voltage 1.80 V 1, 2
I
O
Output Current N/A 1, 2
SKTOCC_N Signal
V
O_ABS_MAX
Output Absolute Max Voltage 3.30 3.50 V 1
I
OMAX
Output Max Current 1 mA 1
Table 7-22. Miscellaneous Signals DC Specifications (Sheet 2 of 2)
Symbol Parameter Min Typical Max Units Notes