Datasheet

Intel® Xeon® Processor E5-2400 v2 Product Family 15
Datasheet Volume One
Overview
• Intel® Virtualization Technology Processor Extensions
• Intel® Trusted Execution Technology (Intel® TXT)
• Intel® 64 Architecture
• Intel® Streaming SIMD Extensions 4.1 (Intel® SSE4.1)
• Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2)
• Intel® Advanced Vector Extensions (Intel® AVX)
• Intel® Hyper-Threading Technology
• Execute Disable Bit
• Intel® Turbo Boost Technology
• Intel® Intelligent Power Technology
• Enhanced Intel SpeedStep® Technology
• Intel® Dynamic Power Technology (Memory Power Management)
1.2 Interfaces
1.2.1 System Memory Support
• Processor supports three DDR3 channels
• Unbuffered DDR3 and registered DDR3 DIMMs
• LR DIMM (Load Reduced DIMM) for buffered memory solutions demanding higher
capacity memory subsystems
• Independent channel mode or lockstep mode
• Data burst length of eight cycles for all memory organization modes
• Memory DDR3 data transfer rates of 800, 1066, 1333, and 1600 MT/s
• 64-bit wide channels plus 8-bits of ECC support for each channel
• DDR3 standard I/O Voltage of 1.5 V and DDR3 Low Voltage of 1.35 V
• 1-Gb, 2-Gb, 4-Gb DDR3 DRAM technologies supported for these devices:
— UDIMMs x8, x16
— RDIMMs x4, x8
— LRDIMM x4, x8 (2-Gb and 4-Gb only)
• Up to 8 ranks supported per memory channel, 1, 2 or 4 ranks per DIMM
• Open with adaptive idle page close timer or closed page policy
• Per channel memory test and initialization engine can initialize DRAM to all logical
zeros with valid ECC (with or without data scrambler) or a predefined test pattern
• Minimum memory configuration: independent channel support with 1 DIMM
populated
• Integrated dual SMBus master controllers
• Command launch modes of 1n/2n
• RAS Support (including and not limited to):
— Rank Level Sparing and Device Tagging
— Demand and Patrol Scrubbing