Datasheet

Intel® Xeon® Processor E5-2400 v2 Product Family 8
Datasheet Volume One
2-29 Package Temperature Read Data.........................................................................52
2-30 Temperature Target Read...................................................................................53
2-31 Thermal Status Word.........................................................................................53
2-32 Thermal Averaging Constant Write / Read ............................................................54
2-33 Current Config Limit Read Data...........................................................................54
2-34 Accumulated Energy Read Data...........................................................................55
2-35 Power Limit Data for VCC Power Plane .................................................................56
2-36 Package Turbo Power Limit Data ......................................................................... 57
2-37 Package Power Limit Performance Data................................................................ 57
2-38 Efficient Performance Indicator Read....................................................................57
2-39 ACPI P-T Notify Data..........................................................................................58
2-40 Caching Agent TOR Read Data ............................................................................59
2-41 DTS Thermal Margin Read ..................................................................................59
2-42 Processor ID Construction Example......................................................................60
2-43 RdIAMSR().......................................................................................................61
2-44 PCI Configuration Address ..................................................................................63
2-45 RdPCIConfig()...................................................................................................64
2-46 PCI Configuration Address for local accesses.........................................................65
2-47 RdPCIConfigLocal()............................................................................................65
2-48 WrPCIConfigLocal() ........................................................................................... 67
2-49 The Processor PECI Power-up Timeline() ..............................................................69
2-50 Temperature Sensor Data Format........................................................................75
4-1 Idle Power Management Breakdown of the Processor Cores.....................................89
4-2 Thread and Core C-State Entry and Exit ............................................................... 89
4-3 Package C-State Entry and Exit...........................................................................93
5-1 Case Temperature Thermal Profile..................................................................... 102
5-2 Digital Thermal Sensor DTS Thermal Profile ........................................................ 103
5-3 Embedded Case Temperature Thermal Profile...................................................... 105
5-4 Embedded DTS Thermal Profile ......................................................................... 107
5-5 Case Temperature (TCASE) Measurement Location .............................................. 108
5-6 Frequency and Voltage Ordering........................................................................ 111
7-1 Input Device Hysteresis ................................................................................... 125
7-2 VR Power-State Transitions............................................................................... 130
7-3 VCC Static and Transient Tolerance Loadlines...................................................... 142
7-4 Load Current Versus Time ................................................................................ 143
7-5 VCC Overshoot Example Waveform.................................................................... 144
7-6 BCLK{0/1} Differential Clock Crosspoint Specification .......................................... 150
7-7 BCLK{0/1} Differential Clock Measurement Points for Duty Cycle and Period........... 151
7-8 BCLK{0/1} Differential Clock Measurement Points for Edge Rate............................ 151
7-9 BCLK{0/1} Differential Clock Measurement Point for Ringback .............................. 151
7-10 BCLK{0/1} Single Ended Clock Measurement Points for Absolute Cross Point
and Swing...................................................................................................... 152
7-11 BCLK{0/1} Single Ended Clock Measurement Points for Delta Cross Point ............... 152
7-12 Maximum Acceptable Overshoot/Undershoot Waveform........................................ 156
9-1 Processor Package Assembly Sketch .................................................................. 194
9-2 Processor Package Drawing Sheet 1 of 2 ............................................................ 196
9-3 Processor Package Drawing Sheet 2 of 2 ........................................................... 197
9-4 Processor Top-Side Markings ........................................................................... 199
10-1 STS100C Passive/Active Combination Heat Sink (with Removable Fan)................... 201
10-2 STS100C Passive/Active Combination Heat Sink (with Fan Removed) ..................... 201
10-3 STS100A Active Heat Sink................................................................................ 202
10-4 STS100P 25.5 mm Tall Passive Heat Sink ........................................................... 202