MOS Integrated Circuit Data Sheet

166
µ PD17062
13.5.3 Cautions in Using the Clock Stop Instruction
The clock stop instruction (STOP s) is effective only when the CE pin is at a low level.
To enable the clock stop state to be released, the program must therefore have a provision to handle when
the CE pin happens to be at a high.
Such a provision is explained using the example below.
Example
XTAL DAT 0000B ; Defines a symbol for the clock stop condition.
CEJDG:
;
SKF1 CE ; Built-in macro
; Checks the input level at the CE pin.
BR MAIN ; Branches to the main process if the CE pin is high.
Process A ; Processing performed when the CE pin is low
;
STOP XTAL ; Stops the clock.
;
BR $ - 1
MAIN:
Main process
BR CEJDG
The above program checks the CE pin at . If the CE pin is at a low, the clock stop instruction (STOP XTAL)
at is executed after process A is finished.
If the CE pin goes high during execution of the STOP XTAL instruction at as shown below, the STOP
XTAL instruction is treated as a no-operation (NOP). If the program does not contain the branch instruction
(BR $ - 1) at , program control is passed to the main process, possibly resulting in a malfunction.
The program must always have a branch instruction at or have a provision that can prevent a malfunction
in the main process.
Even if the CE pin remains high, the branch instruction at allows a CE reset to occur next time the timer
carry FF is set.
5 V
0 V
V
DD
CE pin
STOP XTAL
The STOP XTAL
becomes a NOP
instruction because
the CE pin is high
level.
The program starts from
address 0 in synchronization
with setting of the timer carry
FF. (CE reset)
Main
proces-
sing
Process A
CE pin detection