MOS Integrated Circuit Data Sheet

278

PD17062

22.2 INSTRUCTIONS

Legend

AR : Address register

ASR : Address stack register pointed to by the stack pointer

addr : Program memory address (11 low-order bits)

BANK : Bank register

CMP : Compare flag

CY : Carry flag

DBF : Data buffer

h : Halt release condition

INTEF : Interrupt enable flag

INTR : Register automatically saved in the stack when an interrupt occurs

INTSK : Interrupt stack register

IX : Index register

MP : Data memory row address pointer

MPE : Memory pointer enable flag

m : Data memory address specified by m

R and mC

mR : Data memory row address (high-order)

C : Data memory column address (low-order)

n : Bit position (four bits)

n4 : Immediate data (four bits)

PAGE : Page (Bits 12 and 11 of the program counter)

PC : Program counter

p : Peripheral address

H : Peripheral address (three high-order bits)

L : Peripheral address (four low-order bits)

r : General register column address

rf : Register file address

R : Register file address (three high-order bits)

C : Register file address (four low-order bits)

SP : Stack pointer

s : Stop release condition

WR : Window register

(×) : Contents of ×