User's Manual

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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
5.1 DIGITAL I/O PORTS
The µPD750008 employs the memory mapped I/O method. Thus, all input/output ports are mapped on
the data memory space.
Figure 5-1. Data Memory Addresses of Digital Ports
Remark Some I/O parts can be used as static RAM.
Input/output port manipulation instructions are as listed in Table 5-2. Ports 4 to 7 can be manipulated not
only in 4-bit units, but also in 8-bit or 1-bit units so that these ports can be controlled in various ways.
Example 1. To test the condition of P13 and output different values to ports 4 and 5 according to the test
result:
SKT PORT1. 3 ; Skips if bit 3 of port 1 is 1
MOV XA, #18H ; XA <– 18H
String-effect instructions
MOV XA, #14H ; XA <– 14H
SEL MB15 ; Or CLR1 MBE
OUT PORT4, XA ; Port 5, 4 <– XA
2. SET1 PORT4. @L; Sets the bit(s) specified by the L register, in ports 4 to 7, to 1.
P03 P02 P01 P00
P13 P12 P11 P10
P23 P22 P21 P20
P33 P32 P31 P30
P43 P42 P41 P40
P53 P52 P51 P50
P63 P62 P61 P60
– – P81 P80
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
PORT 6
PORT 8
FF0H
FF1H
FF2H
FF3H
FF4H
FF5H
FF6H
FF8H
Address
3210
FF7H
P73 P72 P71 P70 PORT 7
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