Electronics America 4-Bit Single-Chip Microcomputer User's Manual

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CHAPTER 4. INTERNAL CPU FUNCTIONS
Example Take AND of bit 3 at address 3FH and P33 and set the result in CY.
SET1 CY ; CY← 1
SKT 3FH. 3 ; Skip if bit 3 at address 3FH is 1
CLR1 CY ; CY← 0
AND1 CY, PORT 3. 3 ; CY← CY
∧P33
(2) Skip flag (SK2, SK1, SK0)
The skip flag is a flag to store the skip status. It is set/reset automatically as the CPU executes an instruction.
It is impossible for the user to operate it directly by the program.
(3) Interrupt status flag (IST0)
The interrupt status flag is a flag to store the status of the process under execution (for details, see Table 6-3).
It is impossible for the user to operate it directly by the program.
Table 4-2 Interrupt Status Flag Indication Content
0 Status 0 In a normal programming process.
Enable to accept any interrupt.
1 Status 1 In an interrupting process.
Disable to accept any interrupt.
The content of IST0 is saved to the stack memory as part of the PSW if the interrupt is accepted and then set
automatically to 1 and set to 0 by the RETI instruction.
As it is impossible to operate IST0 by an instruction, it is always that IST0 = 1 during the interrupting process.
So it is impossible to multiplex interrupts, all the interrupt requests having occurred during the interrupting process
are pending until the interrupting process under execution ends (for details, see CHAPTER 6 “INTERRUPT
FUNCTIONS”).
IST0
Status of Process
under Execution
Processing Content and
Interrupt Control