Electronics America 8-Bit Single-Chip Microcontrollers User's Manual

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CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( µ PD78054Y Subseries)
Figure 17-22. Data Transmission from Master to Slave
(Both Master and Slave Selected 9-Clock Wait) (1 of 3)
(a) Start Condition to Address
L
L
L
1
A5 A4 A3 A2 A1 A0 W ACK A6
2345678
D7 D6 D5 D4 D3
123459
L
L
L
L
L
SIO0 ← Address
Master device operation
Transfer line
Slave device operation
SIO0 ← Data
H
L
L
L
L
L
L
L
H
H
H
H
SIO0 ← FFH
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
SCL
SDA0
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
CSIE0
P25
PM25
PM27