Electronics America 8-Bit Single-Chip Microcontrollers User's Manual

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CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( µ PD78054Y Subseries)
Figure 17-23. Data Transmission from Slave to Master
(Both Master and Slave Selected 9-Clock Wait) (1 of 3)
(a) Start Condition to Address
L
L
L
1
A0A1A2A3A4A5A6
R
ACK
2345678
D6D7 D5 D4 D3
21345 9
L
L
L
SIO0 ← Address
Master device operation
Transfer line
SIO0 ← FFH
H
L
L
L
L
L
L
L
H
H
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
SCL
SDA0
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
CSIE0
P25
PM25
PM27
Slave device operation
SIO0 ← Data