Single-Chip Microcontrollers User's Manual

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CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( µ PD78078 SUBSERIES)
(4) Various signals
Figures 17-20 to 17-25 show various signals and flag operations in the serial bus interface control register
(SBIC). Table 17-3 lists various signals in SBI.
Figure 17-20. RELT, CMDT, RELD, and CMDD Operations (Master)
Figure 17-21. RELD and CMDD Operations (Slave)
SCK0
SB0 (SB1)
RELT
CMDT
CMDD
RELD
SIO0
Slave address write to SIO0
(Transfer Start Instruction)
Write FFH to SIO0
(Transfer start instruction)
SIO0
SCK0
SB0 (SB1)
RELD
CMDD
Transfer start instruction
A7 A6 A1 A0
12 789
READY
A7 A6 A1 A0 ACK
Slave address
When addresses match
When addresses do not match