Electronics America Computer Hardware User Manual

133
Chapter 7 Timer/Counter Units
7
Fig. 7-31 Timing of Pulse Width Measurement
Remark D
n
: TM0 count value (n = 0, 1, 2, ...)
Fig. 7-32 Setting of Control Registers for Pulse Width Measurement
(a) Timer control register 0 (TMC0)
(b) Capture/compare control register 0 (CRC0)
76543210
000
0
00 0
1
CRC0
Disables clearing TM0
Both TO0 and TO1 are used for
toggle output
★
OVF0
CR02
TM0
count value
0H
D0
D1
Captured Captured
(D1 – D0) × 8/fCLK
Captured
Count starts
CE0¨ 1
D0 D1 D2 D3
(D3 – D2) × 8/fCLK
(10000H – D1
+ D2) × 8/fCLK
FFFFH
FFFFH
INTP3
external input signal
INTP3
interrupt request
Cleared by software
Captured
D2
D3
76543210
00
0
0
00
1
TMC0
Overflow flag
Enables counting TM0
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