Data Sheet

1. General description
The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2)
to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs
(E
1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is
HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32
lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight
output demultiplexer by using one of the active LOW enable inputs as the data input and
the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use
of current limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active HIGH mutually exclusive outputs
Multiple package options
Complies with JEDEC standard no. 7A
Input levels:
For 74HC238: CMOS level
For 74HCT238: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 4 — 27 January 2016 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC238D 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT238D
74HC238DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT238DB

Summary of content (19 pages)