Data Sheet

ManualsBrandsNEXPERIA ManualsLogic ICsLogic IC - Gate and inverter NOR gate 74HC SO 14

1. General description

The 74HC27; 74HCT27 is a triple 3-input NOR gate. Inputs include clamp diodes. This

enables the use of current limiting resistors to interface inputs to voltages in excess of

2. Features and benefits

 Complies with JEDEC standard no. 7A

 Input levels:

 For 74HC27: CMOS level

 For 74HCT27: TTL level

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 Cto+85C and from 40 Cto+125C

3. Ordering information

74HC27; 74HCT27

Triple 3-input NOR gate

Rev. 5.1 — 27 November 2015 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC27D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

74HCT27D

74HC27DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width

5.3 mm

SOT337-1

74HCT27DB

74HC27PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body

width 4.4 mm

SOT402-1

74HCT27PW

74HC27BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin

quad flat package; no leads; 14 terminals;

body 2.5  3  0.85 mm

SOT762-1

74HCT27BQ

Summary of content (16 pages)

PAGE 1
74HC27; 74HCT27 Triple 3-input NOR gate Rev. 5.1 — 27 November 2015 Product data sheet 1. General description The 74HC27; 74HCT27 is a triple 3-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Complies with JEDEC standard no.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 4. Functional diagram $ % & $ % & $ % & < $ < % & PQD PQD Fig 1. < < Logic symbol Fig 2. IEC logic symbol PQD Fig 3. Logic diagram (one gate) 5. Pinning information 5.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 9 data input 1B, 2B, 3B 2, 4, 10 data input 1C, 2C, 3C 13, 5, 11 data input 1Y, 2Y, 3Y 12, 6, 8 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function table[1] Inputs Outputs nA nB nC nY L L L H X X H L X H X L H X X L [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC27 Min Typ 74HCT27 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate Table 6. Static characteristics type 74HC27; 74HCT27 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CI 25 C Conditions input capacitance 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 3.5 - - - - - pF 74HCT27 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 10. Dynamic characteristics Table 7. Dynamic characteristics type 74HC27; 74HCT27 GND = 0 V; for load circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ Max Max (85 C) Max (125 C) - 28 90 115 135 VCC = 4.5 V - 10 18 23 27 ns VCC = 5.0 V; CL = 15 pF - 8 - - - ns - 8 15 20 23 ns VCC = 2.0 V - 19 75 95 110 ns VCC = 4.
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4HC27; 74HCT27 Nexperia Triple 3-input NOR gate 11. Waveforms 9, Q$ Q% Q& LQSXW 90 *1' W3+/ 92+ W3/+ 9< 90 9; Q< RXWSXW 92/ W7+/ W7/+ DDJ Measurement points are given in Table 8. VOL and VOH are typical voltage output drop that occur with the output load. Fig 6. Table 8. Input (nA, nB, nC) to output (nY) propagation delays and output transition times Measurement points Type Input Output VM VM VX VY 74HC27 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT27 1.3 V 1.3 V 0.1VCC 0.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 9, W: QHJDWLYH SXOVH 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 9 90 90 90 W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 7. Table 9.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 12.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT27 v.5.1 20151127 Product data sheet - 74HC_HCT27 v.5 - 74HC_HCT27 v.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC27; 74HCT27 Nexperia Triple 3-input NOR gate Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use.
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Nexperia 74HC27; 74HCT27 Triple 3-input NOR gate 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . .