User Guide

After Sales
Technical Documentation
Booster Kit BSH–1
Original, 09/94 Page 11
Supply Voltage Circuits
The supply from the vehicle battery is applied to connector X500. The
voltage is first fed through a fuse, followed by suppressor V212 which
protects the booster from overvoltages and transients. The voltage is
then fed through a filter (L210, C213) eliminating potential interference
generated by a vehicle’s electrical system (e.g. alternator). Following the
filter is a mains power switch V218, controlled by the PWRON signal via
transistor V219. After the switch there is a regulator which feeds an 8 V
supply to the main parts of the booster including N601, and the 5 V
regulator which provides the supply for D300, D500 and some biasing
circuits.
HOOK/SDA Buffering
The HOOK/SDA–line is normally used for carrying the
ONHOOK/OFFHOOK information from mount connector MCH–3 to the
CPU of the HFJ. During startup this line is also needed to carry the serial
data from EEPROM to the HFJ. During this operation the normal
operation of the HOOK/SDA–line must be disabled.
The TXI/SCL–line carries the serial clock from HFJ to EEPROM. When
no information is passed to/from EEPROM, TXI/SCL has a potential of
8 V. When data is being transferred, the potential varies between 0 V and
8 V. If the watchdog circuit finds a malfunction in the transmitter, TXI/SCL
goes permanently to 0 V, which inhibits the power–off cycle.
The TXI/SCL line is fed via R509 and C502 to pin 13 of D300. Normally it
has a potential of approx. 3.7 V, which is considered a logic 1 signal.
When pulses appear in the TXI/SCL–line, they loose their d.c. value in
capacitor C502. The positive part of the a.c. signal is grounded via V602
and R528. The negative part reduces the voltage in pin 13 to 1.2 V, which
is considered a logic 0 signal.
Since pin 12 of D300 is connected directly to 5V, the output of D300 rises
high during negative cycles. Output is charging via V505, R500 and
capacitor C503. V505 is also preventing the output of D300 from
discharging C503, therefore the voltage over C503 is gradually
approaching a value close to 5 V.
When the mount connector is ONHOOK, pin 10 of D300 is pulled to
ground via R501 (33 k). However, when TXI/SCL–pulses appear, the
voltage in pin 10 rises to a logic 1. Pin 9 has a pull–up to 5 V, therefore
the output drops to 0. This in turn pulls pin 10 of the open collector type
op.amp N400, to 0 V. Pin 11 of N400 is connected to 2.5 V potential and
therefore the output of N400 (pin 13) will go to Hi–Z mode, which in turn
allows the SDA–data from EEPROM to be transferred to HFJ.