User Guide

ME910G1 Hardware Design Guide
1VV0301593 Rev.15 Page
48 of 100 2022-08-23
Not Subject to NDA
should be minimized. The characteristic impedance value should be as close as possible
to 90 Ohms differential.
ESD protection can be added to USB D+/D- lines in case of external connector for cable
connection. Proper components for USB 2.0 must be used.
SPI
The ME910G1 Module is provided by a standard 3-wire master SPI interface + chip select
control.
The following table lists the available signals:
PAD
Signal
I/O
Function
Type
NOTE
D15
SPI_MOSI O SPI MOSI CMOS 1.8V
Shared with
TX_AUX
E15
SPI_MISO I SPI MISO CMOS 1.8V
Shared with
RX_AUX
F15
SPI_CLK
O
SPI Clock
CMOS 1.8V
H14
SPI_CS
O
SPI Chip Select
CMOS 1.8V
Table 24: Available Signals
Note
: Due to the shared functions, SPI port and TX_AUX/RX_AUX port
cannot be used simultanously.
Refer to ME910G1
series AT command reference guide for port
configuration.
5.7.2.1. SPI Connections
Figure 13: SPI Connections
SPI_CS
SPI MISO
SPI_MOSI
SPI_CLK
E15
D15
F15
ME910G1
Application
Processor
H14
SPI_CS