Integration Guide

Table Of Contents
Enfora Enabler III LPP
Integration Guide Page 22 Revision: 0.00
5.3 CIRCUIT PROTECTION
Other than very low level ESD protection within the module’s integrated circuits, the
module does not have any protection against ESD events or other excursions that
exceed the specified operating parameters.
Generally, ESD protection (typically TVS/Transorb devices) should be added to all
signals that leave the host board. This includes V
BAT
/V
CC
.
Series resistors (typically 47) can also be added in series with data lines to limit
the peak current during a voltage excursion.
Warning: Do not add series resistance to the SIM electrical.
Minimum ESD Protection Levels
ESD/Input Voltage
Pin #’s ESD Test Method High/Peak Units
Pins 4-16, 17, 18,
19, 34, 35
Human Body Model
EIA/JEDEC22-A114-A
500 V
Charge Device Model
EIA/JEDEC22-C101-A
200 V
Pins (all
VBUS/PWR), 37,
38, 42, 43, 44, 46
Human Body Model
EIA/JEDEC22-A114-A
2000 V
Charge Device Model
EIA/JEDEC22-C101-A
500 V
RF Antenna IEC 61000-4-2 8000 V
Table 4: ESD Protection Levels
Warning: It is the Integrator’s responsibility to protect the Enabler III
LPP module from electrical disturbances and excursions, which exceed
the specified operating parameters.