Datasheet
NTE4049, NTE4049T
NTE4050B, NTE4050BT
Integrated Circuit
CMOS, Hex Buffer/Converter
Description:
The NTE4049/NTE4049T (Inverting) and NTE4050B/NTE4050BT (Non−Inverting) are Hex Buffers
and feature logic−level conversion using only one supply voltage (V
DD
). The input−signal high level
(V
IH
) can exceed the V
DD
supply voltage when these devices are used for logic level conversions.
These devices are intended for use as COS/MOS to DTL/TTL converters and can drive directly two
DTL/TTL loads (V
DD
= 5V, V
OL
≤ 400mV, I
OL
≥ 3.2mA).
These devices are available in a standard 16−Lead DIP (NTE4049 and NTE4050B) and SOIC−16
surface mount (NTE4049T and NTE4050BT) type packages.
Features:
D High Sink Current for Driving 2 TTL Loads
D High−to−Low Level Logic Conversion
D Quiescent Current Specified to 20V
D Maximum Input Current of 1μA at 18V (Full Package Temperature Range)
D High “Sink” and “Source” Current Capability
D 5V, 10V, and 15V Parametric Ratings
Absolute Maximum Ratings:
Supply Voltage (Note 1), V
DD
−0.5 to 20V.................................................
Input Voltage, V
I
−0.5 to V
DD
+0.5V......................................................
DC Input Current (Any One Input), I
I
±10mA...............................................
Total Power Dissipation, P
tot
Per Package 200mW.............................................................
Per Output Transistor (T
op
= −40° to +85°C) 100mW.................................
Operating Temperature Range, T
opr
−40° to +85°C.........................................
Storage Temperature Range, T
stg
−65° to +150°C..........................................
Note 1. All voltage values are referred to V
SS
pin voltage.
Recommended Operating Conditions:
Supply Voltage, V
DD
3 to 18V............................................................
Input Voltage (Note 2), V
I
V
DD
to 18V.....................................................
Operating Temperature Range, T
opr
−40° to +85°C.........................................
Note 2. The NTE4049/T and NTE4050B/BT have high−to−low−level voltage conversion capability
but not low−to−high−level; therefore it is recommended that V
IN
≥ V
DD
.