Datasheet

ISD5100 SERIES
Publication Release Date: Oct 31, 2008
- 17 - Revision 1.42
Register Bits
The register load may be used to modify a command
sequence (such as load an address) or used with the null
command sequence to load a configuration or test
register. Not all registers are accessible to the user. [RG2
is always 0 as the four additional combinations are
undefined.]
6.3.3 Opcode Summary
OpCode Command Description
The following commands are used to access the chip through the I
2
C interface.
 Play: analog play command
 Record: analog record command
 Message Cue: analog message cue command
 Read: digital read command
 Write: digital write command
 Erase: digital page and block erase command
 Power up: global power up/down bit. (C7)
 Load CFG0: load configuration register 0
 Load CFG1: load configuration register 1
 Read STATUS: Read the interrupt status and address register, including a hardwired device ID
RG2 RG1 RG0
C2 C1 C0
Function
0 0 0 No action
0 0 1 Reserved
0 1 0 Load CFG0
0 1 1 Load CFG1