User Manual

Jennic
6 JN-DS-JN5148-001 1v2 © Jennic 2009
Preliminary
1 Introduction
The JN5148-001 is an IEEE802.15.4 wireless microcontroller that provides a fully integrated solution for applications
using the IEEE802.15.4 standard in the 2.4 - 2.5GHz ISM frequency band
[1], including ZigBee PRO. It includes all
of the functionality required to meet the IEEE802.15.4 and ZigBee PRO specifications and has additional processor
capability to run a wide range of applications including, but not limited to Smart Energy, Automatic Meter Reading,
Remote Control, Home and Building Automation, Toys and Gaming.
Applications that transfer data wirelessly tend to be more complex than wired ones. Wireless protocols make
stringent demands on frequencies, data formats, timing of data transfers, security and other issues. Application
development must consider the requirements of the wireless network in addition to the product functionality and user
interfaces. To minimise this complexity, Jennic provides a series of software libraries and interfaces that control the
transceiver and peripherals of the JN5148. These libraries and interfaces remove the need for the developer to
understand wireless protocols and greatly simplifies the programming complexities of power modes, interrupts and
hardware functionality.
In view of the above, the register details of the JN5148 are not provided in the datasheet.
The device includes a Wireless Transceiver, RISC CPU, on chip memory and an extensive range of peripherals.
Hereafter, the JN5148-001 will be referred to as JN5148.
1.1 Wireless Transceiver
The Wireless Transceiver comprises a 2.45GHz radio, a modem, a baseband controller and a security coprocessor.
In addition, the radio also provides an output to control transmit-receive switching of external devices such as power
amplifiers allowing applications that require increased transmit power to be realised very easily. Appendix B.4,
describes a complete reference design including Printed Circuit Board (PCB) design and Bill Of Materials (BOM).
The security coprocessor provides hardware-based 128-bit AES-CCM, CBC
(1)
, CTR and CCM* processing as
specified by the IEEE802.15.4 standard. It does this in-band on packets during transmission and reception, requiring
minimal intervention from the CPU. It is also available for off-line use under software control for encrypting and
decrypting packets generated by software layers such as ZigBee and user applications. This means that these
algorithms can be off-loaded by the CPU, increasing the processor bandwidth available for user applications.
The transceiver elements (radio, modem and baseband) work together to provide IEEE802.15.4 Medium Access
Control (MAC) under the control of a protocol stack. Applications incorporating IEEE802.15.4 functionality can be
rapidly developed by combining user-developed application software with a protocol stack library.
(1) AES-CBC processing is only available off-line for use under software control.
1.2 RISC CPU and Memory
A 32-bit RISC CPU allows software to be run on chip, its processing power being shared between the IEEE802.15.4
MAC protocol, other higher layer protocols and the user application. The JN5148 has a unified memory architecture,
code memory, data memory, peripheral devices and I/O ports are organised within the same linear address space.
The device contains 128kbytes of ROM, 128kbytes of RAM and a 32-byte One Time Programmable (OTP) eFuse
memory.