Datasheet

1. General description
The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC04; 74AHCT04 provides six inverting buffers.
2. Features and benefits
Balanced propagation delays
Inputs accept voltages higher than V
CC
Input levels:
For 74AHC04: CMOS level
For 74AHCT04: TTL level
ESD protection:
HBM EIA/JESD22-A114F exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74AHC04; 74AHCT04
hex inverter
Rev. 6 — 7 November 2011 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC04
74AHC04D 40 C to +125 C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHC04PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74AHC04BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
14 terminals; body 2.5 3 0.85 mm
SOT762-1

Summary of content (15 pages)