Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Multiplexer Multiplexer Single supply TSSOP 16

1. General description

The 74AHC257; 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7-A.

The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs,

which select 4 bits of data from two sources and are controlled by a common data select

input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and

the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data

appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.

The 74AHC257; 74AHCT257 is the logic implementation of a 4-pole 2-position switch,

where the position of the switch is determined by the logic levels applied to input S. The

outputs are forced to a high-impedance OFF-state when OE is HIGH.

The logic equations for the outputs are:

1Y = OE × (1I1 × S + 1I0 × S)

2Y = OE × (2I1 × S + 2I0 × S)

3Y = OE × (3I1 × S + 3I0 × S)

4Y = OE × (4I1 × S + 4I0 × S)

The 74AHC257; 74AHCT257 is identical to the 74AHC258; 74AHCT258, but has

non-inverting (true) outputs.

2. Features

n Balanced propagation delays

n All inputs have Schmitt-trigger actions

n Non-inverting data path

n Inputs accept voltages higher than V

n Input levels:

u For 74AHC257: CMOS level

u For 74AHCT257: TTL level

n ESD protection:

u HBM EIA/JESD22-A114E exceeds 2000 V

u MM EIA/JESD22-A115-A exceeds 200 V

u CDM EIA/JESD22-C101C exceeds 1000 V

n Multiple package options

n Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

74AHC257; 74AHCT257

Quad 2-input multiplexer; 3-state

Rev. 02 — 9 May 2008 Product data sheet

Summary of content (16 pages)

PAGE 1
74AHC257; 74AHCT257 Quad 2-input multiplexer; 3-state Rev. 02 — 9 May 2008 Product data sheet 1. General description The 74AHC257; 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S).
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74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC257D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74AHC257PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.
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74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 1 G1 15 EN 1 1I0 2 3 1I1 5 2I0 6 2I1 11 3I0 10 3I1 14 4I0 13 4I1 15 OE S 2 4 1Y 2Y 1 3 MUX 4 1 5 7 7 6 9 3Y 11 9 10 12 4Y 14 12 13 001aad467 mga835 Fig 2. Logic symbol Fig 3. IEC logic symbol 1I0 1Y 1I1 2I0 2Y 2I1 3I0 3Y 3I1 4I0 4Y 4I1 OE S Fig 4. 001aad468 Logic diagram 74AHC_AHCT257_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev.
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74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 5. Pinning information 5.1 Pinning S 1 16 VCC 1I0 2 15 OE 1I1 3 14 4I0 1Y 4 2I0 5 2I1 6 11 3I0 2Y 7 10 3I1 GND 8 13 4I1 257 12 4Y 9 3Y 001aad499 Fig 5. Pin configuration SO16 and TSSOP16 5.2 Pin description Table 2.
PAGE 5
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 6. Functional description Table 3. Function table[1] Control Input Output OE S nI0 nI1 nY H X X X Z L H X L L X H H L X L H X H L [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
PAGE 6
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter Conditions Min Typ Max Unit 74AHC257 VCC supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V 74AHCT257 VCC supply voltage 4.
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4AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA IOZ OFF-state VI = VIH or VIL; output current VO = VCC or GND; VCC = 5.5 V - - ±0.25 - ±2.
PAGE 8
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 4.2 9.3 1.0 11.0 1.0 12.0 ns CL = 50 pF - 6.0 12.8 1.0 14.5 1.0 16.0 ns - 2.9 5.9 1.0 7.0 1.0 7.5 ns - 4.2 7.9 1.0 9.0 1.0 11.
PAGE 9
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max - 3.7 6.5 1.0 8.0 1.0 9.0 ns - 4.9 8.5 1.0 10.0 1.0 11.0 ns CL = 15 pF - 5.1 9.0 1.0 10.5 1.0 11.5 ns CL = 50 pF - 6.4 10.5 1.0 12.5 1.0 13.5 ns - 3.9 8.0 1.
PAGE 10
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 11. Waveforms VI nI0, nI1, S VM input GND t PHL t PLH VOH VM nY output mna486 VOL Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6.
PAGE 11
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. RL = load resistance. S1 = test selection switch. Fig 8.
PAGE 12
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.
PAGE 13
74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.
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74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 14. Revision history Table 11.
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74AHC257; 74AHCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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NXP Semiconductors 74AHC257; 74AHCT257 Quad 2-input multiplexer; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . .