Datasheet

74AHC_AHCT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 8 November 2011 4 of 19
NXP Semiconductors
74AHC573; 74AHCT573
Octal D-type transparant latch; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration SO20 and TSSOP20 Fig 6. Pin configuration DHVQFN20
573
OE V
CC
D0 Q0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
GND LE
001aad099
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
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74AHC573
74AHCT573
Transparent top view
Q7
D6
D7
Q6
D5 Q5
D4 Q4
D3 Q3
D2 Q2
D1 Q1
D0 Q0
GND
LE
OE V
CC
9
12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10 11
1
20
terminal 1
index area
GND
(1)
Table 2. Pin description
Symbol Pin Description
OE
1 output enable input (active LOW)
D0 to D7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0 V)
LE 11 latch enable (active HIGH)
Q0 to Q7 19, 18, 17, 16, 15, 14, 13, 12 data output
V
CC
20 supply voltage