Datasheet

74AHC_AHCT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 8 November 2011 8 of 19
NXP Semiconductors
74AHC573; 74AHCT573
Octal D-type transparant latch; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
74AHC573
t
pd
propagation
delay
Dn to Qn; see Figure 7
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.5 11.0 1.0 13.0 1.0 14.0 ns
C
L
= 50 pF - 7.8 14.5 1.0 16.5 1.0 18.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.9 6.8 1.0 8.0 1.0 8.5 ns
C
L
= 50 pF - 5.5 8.8 1.0 10.0 1.0 11.0 ns
LE to Qn; see Figure 8
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.8 11.9 1.0 14.0 1.0 15.0 ns
C
L
= 50 pF - 8.3 15.4 1.0 17.5 1.0 19.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 4.2 7.7 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 5.9 9.7 1.0 11.0 1.0 12.5 ns
t
en
enable time OE to Qn; see Figure 9
[3]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.8 11.5 1.0 13.5 1.0 14.5 ns
C
L
= 50 pF - 8.3 15.0 1.0 17.0 1.0 19.0 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 4.4 7.7 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 6.3 9.7 1.0 11.0 1.0 12.5 ns
t
dis
disable time OE to Qn; see Figure 9
[4]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 6.8 11.0 1.0 13.0 1.0 14.0 ns
C
L
= 50 pF - 9.7 14.5 1.0 16.5 1.0 18.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 4.6 7.7 1.0 9.0 1.0 10.0 ns
C
L
= 50 pF - 7.4 9.7 1.0 11.0 1.0 12.5 ns
t
W
pulse width LE HIGH; see Figure 8
V
CC
= 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - ns
V
CC
= 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns
t
su
set-up time Dn to LE; see Figure 10
V
CC
= 3.0 V to 3.6 V 3.5 - - 3.5 - 3.5 - ns
V
CC
= 4.5 V to 5.5 V 3.5 - - 3.5 - 3.5 - ns