Datasheet

74AHC_AHCT157_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 9 November 2007 3 of 16
NXP Semiconductors
74AHC157; 74AHCT157
Quad 2-input multiplexer
5. Pinning information
5.1 Pinning
Fig 3. Logic symbol Fig 4. IEC logic symbol
mna483
MULTIPLEXER
OUTPUTS
SELECTOR
1Y
2Y
3Y
4Y
12
9
7
4
S
13
151
14
10
11
6
5
3
2
E
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
mna482
12
9
7
1
G1
15
EN
1
MUX
1
4
13
14
10
11
6
5
3
2
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 5. Pin configuration SO16, TSSOP16 Fig 6. Pin configuration DHVQFN16
74AHC157
74AHCT157
SV
CC
1I0 E
1I1 4I0
1Y 4I1
2I0 4Y
2I1 3I0
2Y 3I1
GND 3Y
001aah066
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aac931
157
2Y 3I1
2I1 3I0
2I0 4Y
GND
(1)
1Y 4I1
1I1 4I0
1I0 E
GND
3Y
S V
CC
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8 9
1
16
terminal 1
index area