Datasheet
74AHC_AHCT1G79 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6 — 23 September 2014 6 of 13
NXP Semiconductors
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
11. Dynamic characteristics
[1] t
pd
is the same as t
PLH
and t
PHL
.
[2] Typical values are measured at V
CC
= 3.3 V.
[3] Typical values are measured at V
CC
= 5.0 V.
[4] C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
=C
PD
V
CC
2
f
i
+ (C
L
V
CC
2
f
o
)where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
Table 8. Dynamic characteristics
GND = 0 V; t
r
= t
f
=
3.0 ns. For test circuit see Figure 6. For waveforms see Figure 5.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
For type 74AHC1G79
t
pd
propagation
delay
CP to Q
[1]
V
CC
= 3.0 V to 3.6 V
[2]
C
L
= 15 pF - 4.9 8.4 1.0 9.8 1.0 11.5 ns
C
L
= 50 pF - 6.9 12.0 1.0 14.0 1.0 15.5 ns
V
CC
= 4.5 V to 5.5 V
[3]
C
L
= 15 pF - 3.5 5.6 1.0 7.0 1.0 8.0 ns
C
L
= 50 pF - 5.1 8.0 1.0 10.0 1.0 11.0 ns
t
su
set-up time D to CP 3.0 1.0 - 3.0 - 4.0 - ns
t
h
hold time D to CP +2.0 1.0 - 2.0 - 3.0 - ns
t
W
pulse width clock HIGH or LOW 3.0 - - 3.0 - 4.0 - ns
f
max
maximum
frequency
90 - - 90 - 70 - MHz
C
PD
power
dissipation
capacitance
per buffer;
C
L
=50pF;f=1 MHz;
V
I
=GNDtoV
CC
[4]
-15- - - - - pF
For type 74AHCT1G79
t
pd
propagation
delay
CP to Q
[1]
V
CC
= 4.5 V to 5.5 V
[3]
C
L
= 15 pF - 3.5 5.0 1.0 6.0 1.0 8.0 ns
C
L
= 50 pF - 5.0 8.0 1.0 10.0 1.0 11.0 ns
t
su
set-up time D to CP 3.0 1.0 - 3.0 - 4.0 - ns
t
h
hold time D to CP +2.0 1.0 - 2.0 - 3.0 - ns
t
W
pulse width clock HIGH or LOW 3.0 - - 3.0 - 4.0 - ns
f
max
maximum
frequency
90 - - 90 - 70 - MHz
C
PD
power
dissipation
capacitance
per buffer;
C
L
=50pF;f=1 MHz;
V
I
=GNDtoV
CC
[4]
-16- - - - - pF