INTEGRATED CIRCUITS DATA SHEET 74ALVC08 Quad 2-input AND gate Product specification Supersedes data of 2003 Feb 04 2003 May 16
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. • 3.6 V tolerant inputs/outputs • CMOS low power consumption Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. • Direct interface with TTL levels (2.7 to 3.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74ALVC08D −40 to +85 °C 14 SO14 plastic SOT108-1 74ALVC08PW −40 to +85 °C 14 TSSOP14 plastic SOT402-1 74ALVC08BQ −40 to +85 °C 14 DHVQFN14 plastic SOT762-1 FUNCTION TABLE See note 1. INPUT OUTPUT nA nB nY L L L L H L H L L H H H Note 1. H = HIGH voltage level; L = LOW voltage level.
Philips Semiconductors Product specification Quad 2-input AND gate handbook, halfpage 1A VCC 1 14 74ALVC08 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2Y 6 9 3A GND(1) Top view 7 8 GND 3Y handbook, halfpage A Y B MNA221 MNA950 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.2 Pin configuration DHVQFN14. Fig.3 Logic diagram (one gate).
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 3.6 V VI input voltage 0 3.6 V VO output voltage VCC = 1.65 to 3.6 V 0 VCC V VCC = 0 V; Power-down mode 0 3.6 V Tamb operating ambient temperature −40 +85 °C tr, tf input rise and fall times VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH VIL VOL VOH HIGH-level input voltage HIGH-level output voltage − V 1.7 − − V 2 − − V 2.7 to 3.6 1.65 to 1.95 − − 0.35 × VCC V 2.3 to 2.7 − − 0.7 V 2.7 to 3.6 − − 0.8 V IO = 100 µA 1.65 to 3.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 AC CHARACTERISTICS TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C tPHL/tPLH propagation delay nA, nB to nY see Figs 6 and 7 1.65 to 1.95 1.2 2.7 5.3 ns 2.3 to 2.7 1.0 1.9 3.2 ns − 2.2 3.0 ns 3.0 to 3.6 1.2 2.0 2.9 ns tPHL tPLH 2.7 Note 1. All typical values are measured at Tamb = 25 °C.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 VEXT handbook, full pagewidth VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL MNA616 VCC VI CL RL VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.65 to 1.95 V VCC 30 pF 1 kΩ open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6V 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 6V Definitions for test circuit: RL = Load resistor.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 To overcome these problems the double-wave soldering method was specifically developed. SOLDERING Introduction to soldering surface mount packages If wave soldering is used the following conditions must be observed for optimal results: This text gives a very brief insight to a complex technology.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(4)(5) suitable not recommended(6) suitable Not
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
Philips Semiconductors Product specification Quad 2-input AND gate 74ALVC08 NOTES 2003 May 16 15
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