INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2003 Jan 24 2003 May 26
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V The 74ALVC74 is a dual positive-edge triggered, D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and complementary Q and Q outputs. • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74ALVC74D −40 to +85 °C 14 SO14 plastic SOT108-1 74ALVC74PW −40 to +85 °C 14 TSSOP14 plastic SOT402-1 74ALVC74BQ −40 to +85 °C 14 DHVQFN14 plastic SOT762-1 FUNCTION TABLES Table 1 See note 1 INPUT Table 2 OUTPUT nSD nRD nCP nD nQ nQ L H X X H L H L X X L H L
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 PINNING PIN SYMBOL DESCRIPTION 1 1RD asynchronous reset-direct input (active LOW) 2 1D data input 3 1CP clock input (LOW-to-HIGH, edge-triggered) 4 1SD asynchronous set-direct input (active LOW) 5 1Q true flip-flop output 6 1Q complement flip-flop output 7 GND ground (0 V) 8 2Q complement flip-flop output 9 2Q true flip-flop output 10 2SD asynchronous set-
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 handbook, halfpage 4 handbook, halfpage 4 3 2 1 2 S 5 3 10 12 13 1D 1CP SD Q D FF 1D 1Q 5 CP C1 Q 6 1Q 6 RD R 1 11 1SD S 9 10 8 12 1RD 2SD C1 1D R 11 MNA419 2D 2CP SD Q D 2Q 9 CP FF Q 2Q 8 RD 13 Fig.4 IEC logic symbol. 2RD MNA420 Fig.5 Functional diagram. handbook, full pagewidth Q C C C C C C D Q C C RD SD CP MNA421 C C Fig.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 3.6 V VI input voltage 0 3.6 V VO output voltage VCC = 1.65 to 3.6 V 0 VCC V VCC = 0 V; Power-down mode 0 3.6 V Tamb operating ambient temperature −40 +85 °C tr, tf input rise and fall times VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH VIL VOL VOH HIGH-level input voltage HIGH-level output voltage 0.65 × VCC − − V 2.3 to 2.7 1.7 − − V 2.7 to 3.6 2 − − V 1.65 to 1.95 − − 0.35 × VCC V 2.3 to 2.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 AC CHARACTERISTICS TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER fmax maximum clock pulse frequency TYP.(1) MAX. UNIT VCC (V) see Figs 6 and 8 1.65 to 1.95 150 275 − MHz 2.3 to 2.7 200 325 − MHz 2.7 250 375 − MHz 3.0 to 3.6 300 425 − MHz Note 1. All typical values are measured at Tamb = 25 °C.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 VI handbook, full pagewidth VM nCP input GND t rem VI VM nSD input GND tW tW VI VM nRD input GND t PHL t PLH VOH nQ output VM VOL VOH VM nQ output VOL MNA423 t PHL t PLH INPUT VCC VM VI tr = tf 1.65 to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns Fig.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 VEXT handbook, full pagewidth VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL MNA616 VCC VI CL RL VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.65 to 1.95 V VCC 30 pF 1 kΩ open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6V 3.0 to 3.6 V 2.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 To overcome these problems the double-wave soldering method was specifically developed. SOLDERING Introduction to soldering surface mount packages If wave soldering is used the following conditions must be observed for optimal results: This text gives a very brief insight to a complex technology.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(4)(5) su
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date.
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger NOTES 2003 May 26 18 74ALVC74
Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger NOTES 2003 May 26 19 74ALVC74
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