Datasheet

74AUP1G0832 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 22 June 2012 2 of 19
NXP Semiconductors
74AUP1G0832
Low-power 3-input AND-OR gate
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AUP1G0832GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363
74AUP1G0832GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 × 1.45 × 0.5 mm
SOT886
74AUP1G0832GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 × 1 × 0.5 mm
SOT891
74AUP1G0832GN −40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 × 1.0 × 0.35 mm
SOT1115
74AUP1G0832GS −40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 × 1.0 × 0.35 mm
SOT1202
Table 2. Marking
Type number Marking code
[1]
74AUP1G0832GW aY
74AUP1G0832GM aY
74AUP1G0832GF aY
74AUP1G0832GN aY
74AUP1G0832GS aY
Fig 1. Logic symbol
001aad943
1
3
6
A
B
C
4
Y