Datasheet

74AUP2G132 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 8 February 2013 12 of 23
NXP Semiconductors
74AUP2G132
Low-power dual 2-input NAND Schmitt trigger
16. Application information
The slow input rise and fall times cause additional power dissipation which can be
calculated using the following formula:
P
add
=f
i
 (t
r
I
CC(AV)
+t
f
I
CC(AV)
)  V
CC
where:
P
add
= additional power dissipation (W);
f
i
= input frequency (MHz);
t
r
= input rise time (ns); 10 % to 90 %;
t
f
= input fall time (ns); 90 % to 10 %;
I
CC(AV)
= average additional supply current (A).
Average I
CC(AV)
differs with positive or negative input transitions, as shown in Figure 14.
(1) Positive-going edge.
(2) Negative-going edge.
Linear change of V
I
between 0.8 V and 2.0 V. All values given are typical, unless otherwise specified.
Fig 14. Average I
CC
as a function of V
CC
001aad027
V
CC
(V)
0.8 3.82.81.8
0.1
0.2
0.3
ΔI
CC(AV)
(mA)
0
(1)
(2)