Datasheet

74AUP2G132 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 8 February 2013 19 of 23
NXP Semiconductors
74AUP2G132
Low-power dual 2-input NAND Schmitt trigger
Fig 21. Package outline SOT1203 (XSON8)
References
Outline
version
European
projection
Issue date
IEC JEDEC JEITA
SOT1203
sot1203_po
10-04-02
10-04-06
Unit
mm
max
nom
min
0.35 0.04 1.40
1.35
1.30
1.05
1.00
0.95
0.55 0.35
0.40
0.35
0.32
A
(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
SOT1203
A
1
b
0.20
0.15
0.12
DEee
1
L
0.35
0.30
0.27
L
1
0 0.5 1 mm
scale
terminal 1
index area
E
D
(4×)
(2)
(8×)
(2)
A
A
1
e
L
L
1
b
e
1
e
1
e
1
1
8
2
7
3
6
4
5