Datasheet

74AUP2G14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 4 December 2012 2 of 21
NXP Semiconductors
74AUP2G14
Low-power dual Schmitt trigger inverter
4. Ordering information
5. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AUP2G14GW 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363
74AUP2G14GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1  1.45  0.5 mm
SOT886
74AUP2G14GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1  1  0.5 mm
SOT891
74AUP2G14GN 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
SOT1115
74AUP2G14GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
SOT1202
Table 2. Marking
Type number Marking code
[1]
74AUP2G14GW pK
74AUP2G14GM pK
74AUP2G14GF pK
74AUP2G14GN pK
74AUP2G14GS pK
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mnb082
1A 1Y
1
6
2A 2Y
3
4
mnb083
1
3
4
6
mnb084
2A
2Y
1A
1Y