Datasheet

74AUP2G241 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 11 February 2013 3 of 26
NXP Semiconductors
74AUP2G241
Low-power dual buffer/line driver; 3-state
5. Functional diagram
6. Pinning information
6.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol
001aah730
1OE
1Y
1A
2OE
2Y
2A
001aah731
EN1
EN2
1
2
Fig 3. Pin configuration SOT765-1 Fig 4. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74AUP2G241
1OE V
CC
1A 2OE
2Y 1Y
GND 2A
001aaf437
1
2
3
4
6
5
8
7
74AUP2G241
1Y
2OE
V
CC
2A
2Y
1A
1OE
GND
001aaf438
36
27
18
45
Transparent top view