Datasheet
74AVCH2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 2 April 2013 11 of 27
NXP Semiconductors
74AVCH2T45
Dual-bit, dual-supply voltage level translator/transceiver; 3-state
[1] t
pd
is the same as t
PLH
and t
PHL
; t
dis
is the same as t
PLZ
and t
PHZ
; t
en
is the same as t
PZL
and t
PZH
.
t
en
is a calculated value using the formula shown in Section 13.4 “Enable times”
Table 12. Dynamic characteristics for temperature range 40 C to +85 C
[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7.
Symbol Parameter Conditions V
CC(B)
Unit
1.2 V 0.1 V 1.5 V 0.1 V 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V
Min Max Min Max Min Max Min Max Min Max
V
CC(A)
= 1.1 V to 1.3 V
t
pd
propagation
delay
A to B 1.0 9.0 0.7 6.8 0.6 6.1 0.5 5.7 0.5 6.1 ns
B to A 1.0 9.0 0.8 8.0 0.7 7.7 0.6 7.2 0.5 7.1 ns
t
dis
disable time DIR to A 2.2 8.8 2.2 8.8 2.2 8.8 2.2 8.8 2.2 8.8 ns
DIR to B 2.2 8.4 1.8 6.7 2.0 6.9 1.7 6.2 2.4 7.2 ns
t
en
enable time DIR to A - 17.4 - 14.7 - 14.6 - 13.4 - 14.3 ns
DIR to B - 17.8 - 15.6 - 14.9 - 14.5 - 14.9 ns
V
CC(A)
= 1.4 V to 1.6 V
t
pd
propagation
delay
A to B 1.0 8.0 0.7 5.4 0.6 4.6 0.5 3.7 0.5 3.5 ns
B to A 1.0 6.8 0.8 5.4 0.7 5.1 0.6 4.7 0.5 4.5 ns
t
dis
disable time DIR to A 1.6 6.3 1.6 6.3 1.6 6.3 1.6 6.3 1.6 6.3 ns
DIR to B 2.0 7.6 1.8 5.9 1.6 6.0 1.2 4.8 1.7 5.5 ns
t
en
enable time DIR to A - 14.4 - 11.3 - 11.1 - 9.5 - 10.0 ns
DIRtoB -14.3-11.7-10.9-10.0- 9.8ns
V
CC(A)
= 1.65 V to 1.95 V
t
pd
propagation
delay
A to B 1.0 7.7 0.6 5.1 0.5 4.3 0.5 3.4 0.5 3.1 ns
B to A 1.0 6.1 0.7 4.6 0.5 4.4 0.5 3.9 0.5 3.7 ns
t
dis
disable time DIR to A 1.6 5.5 1.6 5.5 1.6 5.5 1.6 5.5 1.6 5.5 ns
DIR to B 1.8 7.8 1.8 5.7 1.4 5.8 1.0 4.5 1.5 5.2 ns
t
en
enable time DIR to A - 13.9 - 10.3 - 10.2 - 8.4 - 8.9 ns
DIR to B - 13.2 - 10.6 - 9.8 - 8.9 - 8.6 ns
V
CC(A)
= 2.3V to 2.7V
t
pd
propagation
delay
A to B 1.0 7.2 0.5 4.7 0.5 3.9 0.5 3.0 0.5 2.6 ns
B to A 1.0 5.7 0.6 3.8 0.5 3.4 0.5 3.0 0.5 2.8 ns
t
dis
disable time DIR to A 1.5 4.2 1.5 4.2 1.5 4.2 1.5 4.2 1.5 4.2 ns
DIR to B 1.7 7.3 2.0 5.2 1.5 5.1 0.6 4.2 1.1 4.8 ns
t
en
enable time DIR to A - 13.0 - 9.0 - 8.5 - 7.2 - 7.6 ns
DIR to B - 11.4 - 8.9 - 8.1 - 7.2 - 6.8 ns
V
CC(A)
= 3.0V to 3.6V
t
pd
propagation
delay
A to B 1.0 7.1 0.5 4.5 0.5 3.7 0.5 2.8 0.5 2.4 ns
B to A 1.0 6.1 0.6 3.6 0.5 3.1 0.5 2.6 0.5 2.4 ns
t
dis
disable time DIR to A 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 1.5 4.7 ns
DIR to B 1.7 7.2 0.7 5.5 0.6 5.5 0.7 4.1 1.7 4.7 ns
t
en
enable time DIR to A - 13.3 - 9.1 - 8.6 - 6.7 - 7.1 ns
DIR to B - 11.8 - 9.2 - 8.4 - 7.5 - 7.1 ns