Datasheet

74AVCH2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 2 April 2013 3 of 27
NXP Semiconductors
74AVCH2T45
Dual-bit, dual-supply voltage level translator/transceiver; 3-state
5. Functional diagram
6. Pinning information
6.1 Pinning
Fig 1. Logic symbol Fig 2. Logic diagram
001aag577
DIR
1B
2B
7
6
1A
2A
5
2
3
V
CC(A)
V
CC(B)
001aag578
DIR
1B
2B
1A
2A
V
CC(A)
V
CC(B)
Fig 3. Pin configuration SOT765-1
74AVCH2T45
V
CC(A)
V
CC(B)
1A 1B
2A 2B
GND DIR
001aag583
1
2
3
4
6
5
8
7
Fig 4. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
Fig 5. Pin configuration SOT996-2
74AVCH2T45
2B
1B
V
CC(B)
DIR
2A
1A
V
CC(A)
GND
001aag584
36
27
18
45
Transparent top view
001aaj473
74AVCH2T45
Transparent top view
8
7
6
5
1
2
3
4
V
CC(A)
1A
2A
GND
V
CC(B)
1B
2B
DIR