INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT03 Quad 2-input NAND gate Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 FEATURES The 74HC/HCT03 provide the 2-input NAND function. • Level shift capability The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter.
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 4, 9, 12 1A to 4A data inputs 2, 5, 10, 13 1B to 4B data inputs 3, 6, 8, 11 1Y to 4Y data outputs 7 GND ground (0 V) 14 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. FUNCTION TABLE INPUTS OUTPUT nA nB nY L L H H L H L H Z Z Z L Note 1.
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS VCC DC supply voltage −0.5 +7 V VO DC output voltage −0.5 +7 V IIK DC input diode current 20 mA for VI < −0.5 V or VI > VCC + 0.5 V −IOK DC output diode current 20 mA for VO < −0.5 V −IO DC output sink current 25 mA for − 0.
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”, except that the VOH values are not valid for open drain. They are replaced by IOZ as given below. Output capability: standard (open drain), excepting VOH ICC category: SSI Voltages are referenced to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER −40 to +85 +25 min. typ.
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”, except that the VOH values are not valid for open drain. They are replaced by IOZ as given below. Output capability: standard (open drain), excepting VOH ICC category: SSI Voltages are referenced to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. IOZ max.
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 AC WAVEFORMS HC: VM = 50%; VI = GND to VCC HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times. TEST CIRCUIT AND WAVEFORMS Fig.8 Input pulse definitions. Fig.7 Test circuit (open drain) Definitions for Figs. 7, 8: CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 APPLICATION INFORMATION (1) RON(max) = 0.26 V / 4 mA = 65 Ω (at 25 °C) (b) (a) Fig.9 Pull-up configuration. (1) (2) (3) (4) VCC (R) = 2.0 V; VIL = 0.5 V. VCC (R) = 5.0 V; VIL = 0.8 V. VCC (R) = 4.5 V; VIL = 1.35 V. VCC (R) = 6.0 V; VIL = 1.8 V. Fig.10 Minimum resistive load as a function of the pull-up voltage. Notes to Figs 9 and 10 If VP − VCC (R) > 0.