Datasheet

74HC_HCT107 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 26 January 2015 6 of 19
NXP Semiconductors
74HC107; 74HCT107
Dual JK flip-flop with reset; negative-edge trigger
C
I
input
capacitance
-3.5- pF
74HCT107
V
IH
HIGH-level
input voltage
V
CC
= 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
= 20 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 4 mA 3.98 4.32 - 3.84 - 3.7 - V
V
OL
LOW-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
=20A - 0 0.1 - 0.1 - 0.1 V
I
O
= 4.0 mA - 0.16 0.26 - 0.33 - 0.4 V
I
I
input leakage
current
V
I
=V
CC
or GND;
V
CC
=5.5V
--0.1 - 1.0 - 1.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
=5.5V
--4.0- 40 - 80A
I
CC
additional
supply current
per input pin;
V
I
=V
CC
 2.1 V; I
O
=0A;
other inputs at V
CC
or GND;
V
CC
= 4.5 V to 5.5 V
pin nCP
, nJ - 100 360 - 450 - 490 A
pin nR
- 65 234 - 293 - 319 A
pin nK - 60 216 - 270 - 294 A
C
I
input
capacitance
-3.5- - - - -pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max