Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Inverter Inverter 74HC TSOP 5

1. General description

The 74HC1G04; 74HCT1G04 is a single inverter. Inputs include clamp diodes that enable

the use of current limiting resistors to interface inputs to voltages in excess of V

2. Features and benefits

 Wide supply voltage range from 2.0 V to 6.0 V

 Input levels:

 For 74HC1G04: CMOS level

 For 74HCT1G04: TTL level

 Symmetrical output impedance

 High noise immunity

 Low power dissipation

 Balanced propagation delays

 ESD protection:

 HBM JESD22-A114E exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C

3. Ordering information

74HC1G04; 74HCT1G04

Inverter

Rev. 5 — 25 September 2013 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC1G04GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

SOT353-1

74HCT1G04GW

74HC1G04GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753

74HCT1G04GV

Summary of content (12 pages)

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74HC1G04; 74HCT1G04 Inverter Rev. 5 — 25 September 2013 Product data sheet 1. General description The 74HC1G04; 74HCT1G04 is a single inverter. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Wide supply voltage range from 2.0 V to 6.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 4. Marking Table 2. Marking codes Type number Marking[1] 74HC1G04GW HC 74HCT1G04GW TC 74HC1G04GV H04 74HCT1G04GV T04 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 2 A Y 4 1 2 4 Y A mna108 Fig 1. Logic symbol mna110 mna109 Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning 74HC1G04 74HCT1G04 n.c.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A Y L H H L 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C. Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 V VCC = 6.0 V - 2.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C. Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Min Typ Max Min Max Unit ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 - 20 A ICC additional supply current per input; VCC = 4.5 V to 5.5 V; VI = VCC  2.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 12. Waveforms VM A input tPHL tPLH VM Y output mna111 Measurement points are given in Table 9. Fig 5. The input (A) to output (Y) propagation delays Table 9. Measurement points Type VI VM 74HC1G04 GND to VCC 0.5  VCC 74HCT1G04 GND to 03 V 1.3 V VCC PULSE GENERATOR VI VO DUT RT CL mna101 Test data is given in Table 8.
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4HC1G04; 74HCT1G04 NXP Semiconductors Inverter 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 14. Abbreviations Table 10. Abbreviations Acronym Description DUT Device Under Test TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT1G04 v.5 20130925 Product data sheet - 74HC_HCT1G04 v.4 - 74HC_HCT1G04 v.3 Modifications: 74HC_HCT1G04 v.4 Modifications: • Section 1 “General description” updated.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC1G04; 74HCT1G04 NXP Semiconductors Inverter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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NXP Semiconductors 74HC1G04; 74HCT1G04 Inverter 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . .