Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Inverter Inverter 74HC TSSOP 5

1. General description

The 74HC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single

stage function. The standard output currents are half those of the 74HCU04.

2. Features

n Symmetrical output impedance

n Wide operating voltage range from 2.0 V to 6.0 V

n Low power dissipation

n Balanced propagation delays

n SOT353-1 and SOT753 package options

3. Ordering information

4. Marking

5. Functional diagram

74HC1GU04

Inverter

Rev. 05 — 10 July 2007 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC1GU04GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;

5 leads; body width 1.25 mm

SOT353-1

74HC1GU04GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753

Table 2. Marking codes

Type number Marking

74HC1GU04GW HD

74HC1GU04GV HU4

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram

mna043

mna044

mna045

Summary of content (12 pages)

PAGE 1
74HC1GU04 Inverter Rev. 05 — 10 July 2007 Product data sheet 1. General description The 74HC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single stage function. The standard output currents are half those of the 74HCU04. 2. Features n n n n n Symmetrical output impedance Wide operating voltage range from 2.0 V to 6.0 V Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options 3. Ordering information Table 1.
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74HC1GU04 NXP Semiconductors Inverter 6. Pinning information 6.1 Pinning 74HC1GU04 n.c. 1 A 2 GND 3 5 VCC 4 Y 001aaf105 Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description n.c. 1 not connected A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A Y L H H L 74HC1GU04_5 Product data sheet © NXP B.V.
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74HC1GU04 NXP Semiconductors Inverter 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit −0.5 +7.0 V IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA IO output current −0.5 V < VO < VCC + 0.5 V [1] - ±12.
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74HC1GU04 NXP Semiconductors Inverter Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C. Symbol VOH Parameter HIGH-level output voltage −40 °C to +125 °C Min Typ Max Min Max Unit VI = VIH or VIL LOW-level output voltage VOL −40 °C to +85 °C Conditions IO = −20 µA; VCC = 2.0 V 1.8 2.0 - 1.8 - V IO = −20 µA; VCC = 4.5 V 4.0 4.5 - 4.0 - V IO = −20 µA; VCC = 6.0 V 5.5 6.0 - 5.
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74HC1GU04 NXP Semiconductors Inverter 12. Waveforms A input VM(1) VCC tPHL Y output tPLH PULSE GENERATOR VI VO DUT CL 50 pF RT VM(1) mna046 VM(1) = 0.5 × VCC; VI = GND to VCC. mna034 Test data is given in Table 8. DUT = Device Under Test CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 5. Input to output propagation delays Fig 6. Load circuitry for switching times 13.
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74HC1GU04 NXP Semiconductors Inverter mna049 20 6 ICC (mA) VO (V) Rbias = 560 kΩ VCC 10 3 0.47 µF input output 100 µF VI (f = 1 kHz) A IO GND mna050 0 0 0 3 6 VI (V) Fig 9. VCC = 6.0 V; IO = 0 A Fig 10. Test set-up for measuring forward transfer conductance gfs = ∆IO/∆VI at VO is constant 14.
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4HC1GU04 NXP Semiconductors Inverter Table 9. External components for resonator (f < 1 MHz) All values given are typical and must be used as an initial set-up Frequency R1 R2 C1 C2 10 kHz to 15.9 kHz 2.2 MΩ 220 kΩ 56 pF 20 pF 16 kHz to 24.9 kHz 2.2 MΩ 220 kΩ 56 pF 10 pF 25 kHz to 54.9 kHz 2.2 MΩ 100 kΩ 56 pF 10 pF 55 kHz to 129.9 kHz 2.2 MΩ 100 kΩ 47 pF 5 pF 130 kHz to 199.9 kHz 2.2 MΩ 47 kΩ 47 pF 5 pF 200 kHz to 349.9 kHz 2.2 MΩ 47 kΩ 47 pF 5 pF 350 kHz to 600 kHz 2.
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74HC1GU04 NXP Semiconductors Inverter 15. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.
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74HC1GU04 NXP Semiconductors Inverter Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.
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74HC1GU04 NXP Semiconductors Inverter 16. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC1GU04_5 20070710 Product data sheet - 74HC1GU04_4 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • Legal texts have been adapted to the new company name where appropriate. Package SOT353 changed to SOT353-1 in Table 1 and Figure 14.
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74HC1GU04 NXP Semiconductors Inverter 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC1GU04 NXP Semiconductors Inverter 19. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . .