74HC2GU04 Dual unbuffered inverter Rev. 2 — 20 August 2014 Product data sheet 1. General description The 74HC2GU04 is a high-speed Si-gate CMOS device. The 74HC2GU04 provides two unbuffered inverters. 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 5. Functional diagram 1 1A 1Y 6 3 2A 2Y 4 1 1 1 3 4 $ mnb080 mnb079 Fig 1. 6 Logic symbol Fig 2. < PQD IEC logic symbol Fig 3. Logic diagram (one gate) 6. Pinning information 6.1 Pinning 74HC2GU04 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 001aaf305 Fig 4. Pin configuration 6.2 Pin description Table 3.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 20 mA output current VO = 0.5 V to VCC + 0.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level input voltage VCC = 2.0 V 1.7 1.1 - V VCC = 4.5 V 3.6 2.4 - V VCC = 6.0 V 4.8 3.1 - V VCC = 2.0 V - 0.9 0.3 V VCC = 4.5 V - 2.1 0.9 V VCC = 6.0 V - 2.9 1.2 V IO = 20 A; VCC = 2.0 V 1.9 2.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V - 0 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.33 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 6. Symbol Parameter 25 C Conditions 40 C to +125 C Min Typ Max Min propagation delay tpd nA to nY; see Figure 5 VCC = 2.0 V; CL = 50 pF - 13 60 - 75 90 ns VCC = 4.5 V; CL = 50 pF - 6 12 - 15 18 ns - 5 10 - 13 15 ns VCC = 2.0 V; CL = 50 pF - 18 75 - 95 125 ns VCC = 4.
4HC2GU04 NXP Semiconductors Dual unbuffered inverter Table 9. Measurement points Input Output VM VI tr = tf VM 0.5VCC GND to VCC 6.0 ns 0.5VCC 9&& 9&& 9, 38/6( *(1(5$725 92 5/ Nȍ RSHQ ' 8 7 57 &/ S) PJN Test data is given in Table 10. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Table 10.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter PQE JIV P$ 9 9&& 9 Tamb = 25 C. Fig 8. Typical forward transconductance as a function of supply voltage 14. Typical transfer characteristics PQE ,&& $ 92 9 9, 9 VCC = 2.0 V; IO = 0 A. Fig 9.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter PQE , && P$ 9 2 9 9, 9 VCC = 6.0 V; IO = 0 A. Fig 11. Typical transfer characteristics VCC = 6.0 V 15. Application information Some applications for the 74HC2GU04 are: • Linear amplifier (see Figure 12) • Crystal oscillator (see Figure 13) Remark: All values given are typical values unless otherwise specified. 5 9&& ) 5 8 =/ PQD ZL > 10 k. R1 3 k.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 5 5 8 & & RXW PQD See Table 11 and Table 12. C1 = 47 pF. C2 = 22 pF. R1 = 1 M to 10 M. R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC = 2 mA at VCC = 3.0 V and f = 1 MHz). Fig 13. Crystal oscillator application Table 11. External components for resonator (f < 1 MHz) Frequency R1 R2 C1 C2 10 kHz to 15.9 kHz 2.2 M 220 k 56 pF 20 pF 16 kHz to 24.9 kHz 2.
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74HC2GU04 NXP Semiconductors Dual unbuffered inverter 17. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 18. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC2GU04 v.2 20140820 Product data sheet - 74HC2GU04 v.1 Modifications: 74HC2GU04 v.
74HC2GU04 NXP Semiconductors Dual unbuffered inverter 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC2GU04 NXP Semiconductors Dual unbuffered inverter 21. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . .