Datasheet

74HC_HCT373_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 10 August 2012 12 of 24
NXP Semiconductors
74HC373-Q100; 74HCT373-Q100
Octal D-type transparent latch; 3-state
T
amb
= 40 C to +125 C
t
pd
propagation delay Dn to Qn; see Figure 8
[1]
V
CC
= 2.0 V - - 225 ns
V
CC
= 4.5 V - - 45 ns
V
CC
= 6.0 V - - 38 ns
LE to Qn; see Figure 9
V
CC
= 2.0 V - - 265 ns
V
CC
= 4.5 V - - 53 ns
V
CC
= 6.0 V - - 45 ns
t
en
enable time OE to Qn; see Figure 10
[2]
V
CC
= 2.0 V - - 225 ns
V
CC
= 4.5 V - - 45 ns
V
CC
= 6.0 V - - 38 ns
t
dis
disable time OE to Qn; see Figure 10
[3]
V
CC
= 2.0 V - - 225 ns
V
CC
= 4.5 V - - 45 ns
V
CC
= 6.0 V - - 38 ns
t
t
transition time Qn; see Figure 8 and Figure 9
[4]
V
CC
= 2.0 V - - 90 ns
V
CC
= 4.5 V - - 18 ns
V
CC
= 6.0 V - - 15 ns
t
W
pulse width LE HIGH; see Figure 9
V
CC
= 2.0 V 120 - - ns
V
CC
= 4.5 V 24 - - ns
V
CC
= 6.0 V 20 - - ns
t
su
set-up time Dn to LE; see Figure 11
V
CC
= 2.0 V 75 - - ns
V
CC
= 4.5 V 15 - - ns
V
CC
= 6.0 V 13 - - ns
Table 8. Dynamic characteristics 74HC373-Q100
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter Conditions Min Typ Max Unit