Datasheet

1. General description
The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device
features clock (CP) and data enable (E
) inputs. When E is LOW, the outputs Qn assume
the state of their corresponding Dn inputs that meet the set-up and hold time requirements
on the LOW-to-HIGH clock (CP) transition. Input E
must be stable one set-up time prior to
the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that
enable the use of current limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Common clock and master reset
Eight positive edge-triggered D-type flip-flops
Complies with JEDEC standard no. 7A
Input levels:
For 74HC377: CMOS level
For 74HCT377: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V.
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC377; 74HCT377
Octal D-type flip-flop with data enable; positive-edge trigger
Rev. 3 — 25 September 2013 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC377N 40 C to +85 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT377N
74HC377D 40 C to +85 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
74HCT377D
74HC377DB 40 C to +85 C SSOP20 plastic shrink small outline package; 20 leads; body width
5.3 mm
SOT339-1
74HCT377DB
74HC377PW 40 C to +85 C TSSOP20 plastic thin shrink small outline package; 20 leads; body
width 4.4 mm
SOT360-1
74HCT377PW

Summary of content (19 pages)