Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Inverter Inverter 74HC TSSOP 8

1. General description

The 74HC3G14; 74HCT3G14 is a triple inverter with Schmitt-trigger inputs. Inputs include

clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of V

. Schmitt trigger inputs transform slowly changing input signals

into sharply defined jitter-free output signals.

2. Features and benefits

 Wide supply voltage range from 2.0 V to 6.0 V

 Complies with JEDEC standard no. 7A

 Input levels:

 For 74HC3G14: CMOS level

 For 74HCT3G14: TTL level

 High noise immunity

 Low power dissipation

 Balanced propagation delays

 Unlimited input rise and fall times

 Multiple package options

 ESD protection:

 HBM JESD22-A114E exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Specified from 40 Cto+85C and 40 Cto+125C

3. Applications

 Wave and pulse shaper for highly noisy environments

 Astable multivibrators

 Monostable multivibrators

74HC3G14; 74HCT3G14

Triple inverting Schmitt trigger

Rev. 5 — 9 December 2013 Product data sheet

Summary of content (21 pages)

PAGE 1
74HC3G14; 74HCT3G14 Triple inverting Schmitt trigger Rev. 5 — 9 December 2013 Product data sheet 1. General description The 74HC3G14; 74HCT3G14 is a triple inverter with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. 2. Features and benefits  Wide supply voltage range from 2.0 V to 6.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 4. Ordering information Table 1. Ordering information Type number Package 74HC3G14DP Temperature range Name Description Version 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 7. Pinning information 7.1 Pinning 74HC3G14 74HCT3G14 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 74HC3G14 74HCT3G14 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 001aak036 Transparent top view 001aak035 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) Fig 5. Pin configuration SOT996-2 (XSON8) 7.2 Pin description Table 3.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 20 mA output current VO = 0.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 11. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max HIGH-level VI = VT+ or VT output voltage IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger Table 8. Transfer characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ Max Min Max (85 C) Max (125 C) VCC = 2.0 V 1.00 1.18 1.50 1.00 1.50 1.50 V VCC = 4.5 V 2.30 2.60 3.15 2.30 3.15 3.15 V VCC = 6.0 V 3.00 3.46 4.20 3.00 4.20 4.20 V VCC = 2.0 V 0.30 0.60 0.90 0.30 0.90 0.
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4HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 11.1 Waveforms transfer characteristics VO VT+ VI VH VT− VI VH VT− Fig 6. VT+ VO mna207 mna208 Transfer characteristic Fig 7. mna031 2.0 Definition of VT+, VT and VH mna032 3.0 ICC (mA) ICC (mA) 2.0 1.0 1.0 0 0 0 2.5 VI (V) 5.0 a. VCC = 4.5 V. Fig 8. 0 3.0 VI (V) 6.0 b. VCC = 5.5 V.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger mna028 100 mna029 1.0 ICC (mA) ICC (μA) 0.8 0.6 50 0.4 0.2 0 0 0 1.0 VI (V) 2.5 0 2.0 a. VCC = 2.0 V VI (V) 5.0 b. VCC = 4.5 V mna030 1.6 ICC (mA) 0.8 0 0 c. Fig 9. 3.0 VI (V) 6.0 VCC = 6.0 V Typical 74HC3G14 transfer characteristics 74HC_HCT3G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 December 2013 © NXP B.V. 2013. All rights reserved.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 12. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ Max Min Max (85 C) Max (125 C) VCC = 2.0 V - 53 125 - 155 190 ns VCC = 4.5 V - 16 25 - 31 38 ns VCC = 6.0 V - 13 21 - 26 32 ns VCC = 2.0 V - 20 75 - 95 110 ns VCC = 4.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 13. Waveforms VI nA input VM VM GND t PHL t PLH VOH nY output 90 % VM VM 10 % VOL t THL t TLH mna722 Measurement points are given in Table 10. VOL and VOH are typical voltage output levels that occur with the output load. Fig 10. The data input (nA) to output (nY) propagation delays and output transition times Table 10. Measurement points Type Input Output VM VM 74HC3G14 0.5VCC 0.5VCC 74HCT3G14 1.3 V 1.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger VI tW 90 % negative pulse VM 0V VI tf tr tr tf 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC VI G VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 11. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 11.
PAGE 12
74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 14. Application information The slow input rise and fall times cause additional power dissipation, which can be calculated using the following formula: Padd = fi  (tr  ICC(AV) + tf  ICC(AV))  VCC where: Padd = additional power dissipation (W); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; tf = input fall time (ns); 90 % to 10 %; ICC(AV) = average additional supply current (A).
PAGE 13
74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger mna058 200 ΔICC(AV) (μA) 150 positive-going edge 100 negative-going edge 50 0 0 2 4 VCC (V) 6 linear change of VI between 0.1VCC to 0.9VCC. Fig 13. ICC(AV) as a function of VCC for 74HCT3G14 R C mna035 1 T 1 0.8  RC For 74HC3G14: f = ---  --------------------- 1 T 1 0.67  RC For 74HCT3G14: f = ---  -----------------------For K-factor, see Figure 15 Fig 14.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger DDD . DDD . 9&& 9 9&& 9 K-factor for 74HC3G14 K-factor for 74HCT3G14 Fig 15. Typical K-factor for relaxation oscillator 74HC_HCT3G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 9 December 2013 © NXP B.V. 2013. All rights reserved.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 15. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 (A3) A1 pin 1 index θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D E SOT765-1 A X c y HE v M A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 4 e L detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ mm 1 0.15 0.00 0.85 0.60 0.12 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm B D SOT996-2 A E A A1 detail X terminal 1 index area e1 1 4 8 5 C C A B C v w b e L1 y y1 C L2 L X 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit(1) max nom min mm A A1 b 0.05 0.35 D E 2.1 3.1 0.5 0.00 0.15 1.9 e e1 0.5 1.5 2.9 L L1 L2 0.5 0.15 0.6 0.3 0.05 0.4 v 0.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 16. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 17. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT3G14 v.5 20131209 Product data sheet - 74HC_HCT3G14 v.4 Modifications: 74HC_HCT3G14 v.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC3G14; 74HCT3G14 NXP Semiconductors Triple inverting Schmitt trigger Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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NXP Semiconductors 74HC3G14; 74HCT3G14 Triple inverting Schmitt trigger 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 12 13 14 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .