Datasheet

9397 750 13812 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 17 of 25
Philips Semiconductors
74HC40103
8-bit synchronous binary down counter
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
V
M
= 0.5 × V
I
.
V
M
= 0.5 × V
I
.
Fig 11. Waveforms showing hold and set-up times for
Pn,
PE to CP
Fig 12. Waveforms showing hold and set-up times for
MR or PE to CP
V
M
V
M
stable
001aab931
PE input
CP input
P0 to P7
input
t
su
t
h
V
M
t
su
t
h
001aab930
TE or PE
input
CP input
V
M
t
su
t
h
V
M
Test data is given in Table 9.
Definitions for test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
Fig 13. Load circuitry for switching times
Table 9: Test data
Supply Input Load
V
CC
V
I
t
r
, t
f
C
L
2.0 V V
CC
6 ns 50 pF
4.5 V V
CC
6 ns 50 pF
6.0 V V
CC
6 ns 50 pF
5.0 V V
CC
6 ns 15 pF
mna101
V
CC
V
I
V
O
R
T
C
L
PULSE
GENERATOR
D.U.T.